| Application number | Title of the application | Filing Date | Status |
|---|
| 06/290132 | HIGH VOLTAGE SEMICONDUCTOR DEVICE HAVING AN IMPROVED DV/DT CAPABILITY AND PLASMA SPREADING | Aug 4, 1981 | Abandoned |
Array
(
[id] => 2034458
[patent_doc_number] => 04396932
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-02
[patent_title] => 'Method for making a light-activated line-operable zero-crossing switch including two lateral transistors, the emitter of one lying between the emitter and collector of the other'
[patent_app_type] => 1
[patent_app_number] => 6/288861
[patent_app_country] => US
[patent_app_date] => 1981-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2300
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/396/04396932.pdf
[firstpage_image] =>[orig_patent_app_number] => 288861
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/288861 | Method for making a light-activated line-operable zero-crossing switch including two lateral transistors, the emitter of one lying between the emitter and collector of the other | Jul 30, 1981 | Issued |
Array
(
[id] => 2389281
[patent_doc_number] => 04709159
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-11-24
[patent_title] => 'Capacitance multiplier circuit'
[patent_app_type] => 1
[patent_app_number] => 6/286119
[patent_app_country] => US
[patent_app_date] => 1981-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 1912
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/709/04709159.pdf
[firstpage_image] =>[orig_patent_app_number] => 286119
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/286119 | Capacitance multiplier circuit | Jul 22, 1981 | Issued |
Array
(
[id] => 1975148
[patent_doc_number] => 04354121
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-10-12
[patent_title] => 'Field controlled thyristor control circuit with additional FCT in reverse bias circuit'
[patent_app_type] => 1
[patent_app_number] => 6/284794
[patent_app_country] => US
[patent_app_date] => 1981-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 5896
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 559
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/354/04354121.pdf
[firstpage_image] =>[orig_patent_app_number] => 284794
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/284794 | Field controlled thyristor control circuit with additional FCT in reverse bias circuit | Jul 9, 1981 | Issued |
Array
(
[id] => 2166018
[patent_doc_number] => 04500901
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-02-19
[patent_title] => 'Thyristor having n.sup.+ - main and auxiliary emitters and a p.sup.+ ring forming a p.sup.+ n.sup.+ junction with the main emitter'
[patent_app_type] => 1
[patent_app_number] => 6/277322
[patent_app_country] => US
[patent_app_date] => 1981-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 5383
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/500/04500901.pdf
[firstpage_image] =>[orig_patent_app_number] => 277322
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/277322 | Thyristor having n.sup.+ - main and auxiliary emitters and a p.sup.+ ring forming a p.sup.+ n.sup.+ junction with the main emitter | Jun 24, 1981 | Issued |
Array
(
[id] => 2085973
[patent_doc_number] => 04450467
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-05-22
[patent_title] => 'Gate turn-off thyristor with selective anode penetrating shorts'
[patent_app_type] => 1
[patent_app_number] => 6/273035
[patent_app_country] => US
[patent_app_date] => 1981-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4686
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/450/04450467.pdf
[firstpage_image] =>[orig_patent_app_number] => 273035
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/273035 | Gate turn-off thyristor with selective anode penetrating shorts | Jun 11, 1981 | Issued |
Array
(
[id] => 2197224
[patent_doc_number] => 04511913
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-04-16
[patent_title] => 'Gate-turn off thyristor with optimized anode shorting resistance, R.sub.so'
[patent_app_type] => 1
[patent_app_number] => 6/267676
[patent_app_country] => US
[patent_app_date] => 1981-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 5243
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 334
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/511/04511913.pdf
[firstpage_image] =>[orig_patent_app_number] => 267676
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/267676 | Gate-turn off thyristor with optimized anode shorting resistance, R.sub.so | May 26, 1981 | Issued |
Array
(
[id] => 2116489
[patent_doc_number] => 04485393
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-27
[patent_title] => 'Semiconductor device with selective nitride layer over channel stop'
[patent_app_type] => 1
[patent_app_number] => 6/267420
[patent_app_country] => US
[patent_app_date] => 1981-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 3597
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 20
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/485/04485393.pdf
[firstpage_image] =>[orig_patent_app_number] => 267420
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/267420 | Semiconductor device with selective nitride layer over channel stop | May 25, 1981 | Issued |
Array
(
[id] => 1976441
[patent_doc_number] => 04365264
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-12-21
[patent_title] => 'Semiconductor device with high density low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating layer'
[patent_app_type] => 1
[patent_app_number] => 6/265167
[patent_app_country] => US
[patent_app_date] => 1981-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 7170
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/365/04365264.pdf
[firstpage_image] =>[orig_patent_app_number] => 265167
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/265167 | Semiconductor device with high density low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating layer | May 18, 1981 | Issued |
Array
(
[id] => 1980354
[patent_doc_number] => 04352028
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-09-28
[patent_title] => 'Circuit arrangement for reducing the recovery time of a thyristor comprising R-C-D network between auxiliary and main emitters'
[patent_app_type] => 1
[patent_app_number] => 6/264140
[patent_app_country] => US
[patent_app_date] => 1981-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2708
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/352/04352028.pdf
[firstpage_image] =>[orig_patent_app_number] => 264140
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/264140 | Circuit arrangement for reducing the recovery time of a thyristor comprising R-C-D network between auxiliary and main emitters | May 14, 1981 | Issued |
Array
(
[id] => 2009137
[patent_doc_number] => 04398207
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-09
[patent_title] => 'MOS Digital-to-analog converter with resistor chain using compensating \"dummy\" metal contacts'
[patent_app_type] => 1
[patent_app_number] => 6/263040
[patent_app_country] => US
[patent_app_date] => 1981-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 6097
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/398/04398207.pdf
[firstpage_image] =>[orig_patent_app_number] => 263040
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/263040 | MOS Digital-to-analog converter with resistor chain using compensating "dummy" metal contacts | May 11, 1981 | Issued |
| 06/261666 | LARGE-AREA, HIGH-VOLTAGE THYRISTOR | May 6, 1981 | Abandoned |
Array
(
[id] => 2041063
[patent_doc_number] => 04414559
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-11-08
[patent_title] => 'Semiconductor thyristor device with laterally displaced auxiliary and main cathode regions'
[patent_app_type] => 1
[patent_app_number] => 6/255167
[patent_app_country] => US
[patent_app_date] => 1981-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2547
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 410
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/414/04414559.pdf
[firstpage_image] =>[orig_patent_app_number] => 255167
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/255167 | Semiconductor thyristor device with laterally displaced auxiliary and main cathode regions | Apr 16, 1981 | Issued |
Array
(
[id] => 1999976
[patent_doc_number] => 04384300
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-05-17
[patent_title] => 'Negative resistance device'
[patent_app_type] => 1
[patent_app_number] => 6/254117
[patent_app_country] => US
[patent_app_date] => 1981-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 4266
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/384/04384300.pdf
[firstpage_image] =>[orig_patent_app_number] => 254117
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/254117 | Negative resistance device | Apr 13, 1981 | Issued |
Array
(
[id] => 2129993
[patent_doc_number] => 04426659
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-01-17
[patent_title] => 'Housing for high-power semiconductor components with large diameter intermediate contact disks of differing thicknesses'
[patent_app_type] => 1
[patent_app_number] => 6/252208
[patent_app_country] => US
[patent_app_date] => 1981-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1563
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/426/04426659.pdf
[firstpage_image] =>[orig_patent_app_number] => 252208
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/252208 | Housing for high-power semiconductor components with large diameter intermediate contact disks of differing thicknesses | Apr 7, 1981 | Issued |
Array
(
[id] => 2426322
[patent_doc_number] => 04734749
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-29
[patent_title] => 'Semiconductor mesa contact with low parasitic capacitance and resistance'
[patent_app_type] => 1
[patent_app_number] => 6/251912
[patent_app_country] => US
[patent_app_date] => 1981-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 11
[patent_no_of_words] => 2511
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/734/04734749.pdf
[firstpage_image] =>[orig_patent_app_number] => 251912
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/251912 | Semiconductor mesa contact with low parasitic capacitance and resistance | Apr 6, 1981 | Issued |
| 06/246062 | HIGH VOLTAGE MOS TRANSISTOR | Mar 19, 1981 | Abandoned |
Array
(
[id] => 2260925
[patent_doc_number] => 04618781
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-10-21
[patent_title] => 'Gate turn-off thyristor construction'
[patent_app_type] => 1
[patent_app_number] => 6/246019
[patent_app_country] => US
[patent_app_date] => 1981-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3077
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 324
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/618/04618781.pdf
[firstpage_image] =>[orig_patent_app_number] => 246019
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/246019 | Gate turn-off thyristor construction | Mar 19, 1981 | Issued |
| 06/245401 | AMPLIFYING GATE THYRISTOR HAVING HIGH GATE SENSITIVITY AND HIGH DV/DT RATING | Mar 18, 1981 | Abandoned |
Array
(
[id] => 2281504
[patent_doc_number] => 04611222
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-09-09
[patent_title] => 'Solid-state switch'
[patent_app_type] => 1
[patent_app_number] => 6/244564
[patent_app_country] => US
[patent_app_date] => 1981-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2438
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/611/04611222.pdf
[firstpage_image] =>[orig_patent_app_number] => 244564
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/244564 | Solid-state switch | Mar 16, 1981 | Issued |