Jessica S. Manno

Array ( [id] => 7425342 [patent_doc_number] => 20040183807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Multi-texturing by walking an appropriately-sized supertile over a primitive' [patent_app_type] => new [patent_app_number] => 10/393528 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13337 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183807.pdf [firstpage_image] =>[orig_patent_app_number] => 10393528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6723861 [patent_doc_number] => 20030206173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Geometry processor capable of executing input/output and high speed geometry calculation processing in parallel' [patent_app_type] => new [patent_app_number] => 10/391253 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 22858 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20030206173.pdf [firstpage_image] =>[orig_patent_app_number] => 10391253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 964346 [patent_doc_number] => 06950106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => '3-dimensional graphic plotting apparatus' [patent_app_type] => utility [patent_app_number] => 10/476210 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10049 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/950/06950106.pdf [firstpage_image] =>[orig_patent_app_number] => 10476210 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 731658 [patent_doc_number] => 07042460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Method and apparatus for rasterizing in a hierarchical tile order' [patent_app_type] => utility [patent_app_number] => 10/383276 [patent_app_country] => US [patent_app_date] => 2003-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6642 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042460.pdf [firstpage_image] =>[orig_patent_app_number] => 10383276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6828150 [patent_doc_number] => 20030179208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Dynamically adjusting a number of rendering passes in a graphics system' [patent_app_type] => new [patent_app_number] => 10/383234 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16901 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20030179208.pdf [firstpage_image] =>[orig_patent_app_number] => 10383234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 784053 [patent_doc_number] => 06992673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Memory access device, semiconductor device, memory access method, computer program and recording medium' [patent_app_type] => utility [patent_app_number] => 10/376983 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 34 [patent_no_of_words] => 8834 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 397 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/992/06992673.pdf [firstpage_image] =>[orig_patent_app_number] => 10376983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6833228 [patent_doc_number] => 20030160773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Microcomputer having OSD circuit, and bus control device and method' [patent_app_type] => new [patent_app_number] => 10/374132 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4795 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160773.pdf [firstpage_image] =>[orig_patent_app_number] => 10374132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 704130 [patent_doc_number] => 07064764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Liquid crystal display control device' [patent_app_type] => utility [patent_app_number] => 10/373079 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 2739 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064764.pdf [firstpage_image] =>[orig_patent_app_number] => 10373079 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 784055 [patent_doc_number] => 06992675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'System for displaying video on a portable device and method thereof' [patent_app_type] => utility [patent_app_number] => 10/357590 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5275 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/992/06992675.pdf [firstpage_image] =>[orig_patent_app_number] => 10357590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1183550 [patent_doc_number] => 06741257 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-25 [patent_title] => 'Graphics engine command FIFO for programming multiple registers using a mapping index with register offsets' [patent_app_type] => B1 [patent_app_number] => 10/248431 [patent_app_country] => US [patent_app_date] => 2003-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/741/06741257.pdf [firstpage_image] =>[orig_patent_app_number] => 10248431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1222856 [patent_doc_number] => 06704023 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => '3-D graphics chip with embedded DRAMbuffers' [patent_app_type] => B1 [patent_app_number] => 10/341852 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4784 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704023.pdf [firstpage_image] =>[orig_patent_app_number] => 10341852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 740619 [patent_doc_number] => 07034838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Information processing apparatus' [patent_app_type] => utility [patent_app_number] => 10/327908 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 14778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/034/07034838.pdf [firstpage_image] =>[orig_patent_app_number] => 10327908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7301936 [patent_doc_number] => 20040113913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'System and method for processing memory with YCbCr 4:2:0 planar video data format' [patent_app_type] => new [patent_app_number] => 10/321320 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5255 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113913.pdf [firstpage_image] =>[orig_patent_app_number] => 10321320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7287188 [patent_doc_number] => 20040109003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'TEXTURE CREATING METHOD, TEXTURE CREATING APPARATUS AND COMPUTER-READABLE RECORDING MEDIUM CONTAINING TEXTURE CREATING PROGRAM.' [patent_app_type] => new [patent_app_number] => 10/309676 [patent_app_country] => US [patent_app_date] => 2002-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5704 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109003.pdf [firstpage_image] =>[orig_patent_app_number] => 10309676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6812266 [patent_doc_number] => 20030071816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Symmetrical accelerated graphics port (AGP)' [patent_app_type] => new [patent_app_number] => 10/304497 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6947 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071816.pdf [firstpage_image] =>[orig_patent_app_number] => 10304497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7630710 [patent_doc_number] => 06636226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method and apparatus for controlling compressed Z information in a video graphics system' [patent_app_type] => B2 [patent_app_number] => 10/303593 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6048 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636226.pdf [firstpage_image] =>[orig_patent_app_number] => 10303593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 986168 [patent_doc_number] => 06924810 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-02 [patent_title] => 'Hierarchical texture cache' [patent_app_type] => utility [patent_app_number] => 10/299367 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5216 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924810.pdf [firstpage_image] =>[orig_patent_app_number] => 10299367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6777193 [patent_doc_number] => 20030048274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Data processing apparatus having DRAM incorporated therein' [patent_app_type] => new [patent_app_number] => 10/284153 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10018 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20030048274.pdf [firstpage_image] =>[orig_patent_app_number] => 10284153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1162428 [patent_doc_number] => 06762762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'Graphics accelerator' [patent_app_type] => B2 [patent_app_number] => 10/282822 [patent_app_country] => US [patent_app_date] => 2002-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 36763 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762762.pdf [firstpage_image] =>[orig_patent_app_number] => 10282822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 854203 [patent_doc_number] => RE040326 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2008-05-20 [patent_title] => 'Single chip frame buffer and graphics accelerator' [patent_app_type] => reissue [patent_app_number] => 10/264013 [patent_app_country] => US [patent_app_date] => 2002-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 10457 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/040/RE040326.pdf [firstpage_image] =>[orig_patent_app_number] => 10264013 [rel_patent_id] =>[rel_patent_doc_number] =>)