Jessica S. Manno

Array ( [id] => 745600 [patent_doc_number] => 07031206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Digital line delay using a single port memory' [patent_app_type] => utility [patent_app_number] => 10/490015 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4029 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031206.pdf [firstpage_image] =>[orig_patent_app_number] => 10490015 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6743536 [patent_doc_number] => 20030020719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Re-generating a displayed image' [patent_app_type] => new [patent_app_number] => 10/247645 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7779 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20030020719.pdf [firstpage_image] =>[orig_patent_app_number] => 10247645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 973352 [patent_doc_number] => 06937243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Transmission circuit and manufacture method for the same' [patent_app_type] => utility [patent_app_number] => 10/200343 [patent_app_country] => US [patent_app_date] => 2002-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937243.pdf [firstpage_image] =>[orig_patent_app_number] => 10200343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7350666 [patent_doc_number] => 20040012609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Data management to enable video rate anti-aliasing convolution' [patent_app_type] => new [patent_app_number] => 10/200087 [patent_app_country] => US [patent_app_date] => 2002-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13059 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20040012609.pdf [firstpage_image] =>[orig_patent_app_number] => 10200087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7430887 [patent_doc_number] => 20040008200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Method for context switching a graphics accelerator comprising multiple rendering pipelines' [patent_app_type] => new [patent_app_number] => 10/194446 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11798 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008200.pdf [firstpage_image] =>[orig_patent_app_number] => 10194446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 635421 [patent_doc_number] => 07129952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-31 [patent_title] => 'Core logic circuit of computer system capable of accelerating 3D graphics' [patent_app_type] => utility [patent_app_number] => 10/176398 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3053 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/129/07129952.pdf [firstpage_image] =>[orig_patent_app_number] => 10176398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1107396 [patent_doc_number] => 06812927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'System and method for avoiding depth clears using a stencil buffer' [patent_app_type] => B1 [patent_app_number] => 10/175199 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5708 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812927.pdf [firstpage_image] =>[orig_patent_app_number] => 10175199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1156042 [patent_doc_number] => 06771271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'Apparatus and method of processing image data' [patent_app_type] => B2 [patent_app_number] => 10/170604 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6414 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/771/06771271.pdf [firstpage_image] =>[orig_patent_app_number] => 10170604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1015631 [patent_doc_number] => 06894692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'System and method for sychronizing video data streams' [patent_app_type] => utility [patent_app_number] => 10/167098 [patent_app_country] => US [patent_app_date] => 2002-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7027 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894692.pdf [firstpage_image] =>[orig_patent_app_number] => 10167098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6640346 [patent_doc_number] => 20030006992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Data transfer device and method' [patent_app_type] => new [patent_app_number] => 10/146892 [patent_app_country] => US [patent_app_date] => 2002-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13599 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20030006992.pdf [firstpage_image] =>[orig_patent_app_number] => 10146892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 748238 [patent_doc_number] => 07027056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Graphics engine, and display driver IC and display module incorporating the graphics engine' [patent_app_type] => utility [patent_app_number] => 10/141797 [patent_app_country] => US [patent_app_date] => 2002-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 12094 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/027/07027056.pdf [firstpage_image] =>[orig_patent_app_number] => 10141797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1019353 [patent_doc_number] => 06891543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Method and system for optimally sharing memory between a host processor and graphics processor' [patent_app_type] => utility [patent_app_number] => 10/140263 [patent_app_country] => US [patent_app_date] => 2002-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10637 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891543.pdf [firstpage_image] =>[orig_patent_app_number] => 10140263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1416043 [patent_doc_number] => 06535216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Multi-processor graphics accelerator' [patent_app_type] => B1 [patent_app_number] => 10/136585 [patent_app_country] => US [patent_app_date] => 2002-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 15731 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535216.pdf [firstpage_image] =>[orig_patent_app_number] => 10136585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1286672 [patent_doc_number] => 06642928 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Multi-processor graphics accelerator' [patent_app_type] => B1 [patent_app_number] => 10/136505 [patent_app_country] => US [patent_app_date] => 2002-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 15745 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642928.pdf [firstpage_image] =>[orig_patent_app_number] => 10136505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 767916 [patent_doc_number] => 07009618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-07 [patent_title] => 'Integrated I/O Remapping mechanism' [patent_app_type] => utility [patent_app_number] => 10/135461 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8765 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009618.pdf [firstpage_image] =>[orig_patent_app_number] => 10135461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6719201 [patent_doc_number] => 20030052889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'High performance graphics controller' [patent_app_type] => new [patent_app_number] => 10/131631 [patent_app_country] => US [patent_app_date] => 2002-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4043 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20030052889.pdf [firstpage_image] =>[orig_patent_app_number] => 10131631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7627559 [patent_doc_number] => 06806881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Graphics controller for high speed transmission of memory read commands' [patent_app_type] => B2 [patent_app_number] => 10/128829 [patent_app_country] => US [patent_app_date] => 2002-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5379 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806881.pdf [firstpage_image] =>[orig_patent_app_number] => 10128829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1178468 [patent_doc_number] => 06750868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Universal accelerated graphic port system and method for operating the same' [patent_app_type] => B2 [patent_app_number] => 10/131170 [patent_app_country] => US [patent_app_date] => 2002-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3706 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750868.pdf [firstpage_image] =>[orig_patent_app_number] => 10131170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1174260 [patent_doc_number] => 06753871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'Memory access method' [patent_app_type] => B2 [patent_app_number] => 10/126694 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/753/06753871.pdf [firstpage_image] =>[orig_patent_app_number] => 10126694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1162463 [patent_doc_number] => 06762764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'System and method for processing image, and compiler for use in this system' [patent_app_type] => B2 [patent_app_number] => 10/125484 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762764.pdf [firstpage_image] =>[orig_patent_app_number] => 10125484 [rel_patent_id] =>[rel_patent_doc_number] =>)