Search

Jessica S. Manno

Supervisory Patent Examiner (ID: 4994, Phone: (571)272-2339 , Office: P/2828 )

Most Active Art Unit
2873
Art Unit(s)
2828, 2873, 2898
Total Applications
691
Issued Applications
505
Pending Applications
42
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6419498 [patent_doc_number] => 20020126125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Graphic processing apparatus and method' [patent_app_type] => new [patent_app_number] => 10/123136 [patent_app_country] => US [patent_app_date] => 2002-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4270 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20020126125.pdf [firstpage_image] =>[orig_patent_app_number] => 10123136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/123136
Graphic processing apparatus and method Apr 16, 2002 Issued
Array ( [id] => 786227 [patent_doc_number] => 06989836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Acceleration of graphics for remote display using redirection of rendering and compression' [patent_app_type] => utility [patent_app_number] => 10/117441 [patent_app_country] => US [patent_app_date] => 2002-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3273 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989836.pdf [firstpage_image] =>[orig_patent_app_number] => 10117441 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117441
Acceleration of graphics for remote display using redirection of rendering and compression Apr 4, 2002 Issued
Array ( [id] => 6728360 [patent_doc_number] => 20030184550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Virtual frame buffer control system' [patent_app_type] => new [patent_app_number] => 10/109030 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4917 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20030184550.pdf [firstpage_image] =>[orig_patent_app_number] => 10109030 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/109030
Virtual frame buffer control system Mar 27, 2002 Issued
Array ( [id] => 1343454 [patent_doc_number] => 06593929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'High performance low cost video game system with coprocessor providing high speed efficient 3D graphics and digital audio signal processing' [patent_app_type] => B2 [patent_app_number] => 10/106445 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 93 [patent_figures_cnt] => 196 [patent_no_of_words] => 35335 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593929.pdf [firstpage_image] =>[orig_patent_app_number] => 10106445 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106445
High performance low cost video game system with coprocessor providing high speed efficient 3D graphics and digital audio signal processing Mar 26, 2002 Issued
Array ( [id] => 1211718 [patent_doc_number] => 06714203 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Data aware clustered architecture for an image generator' [patent_app_type] => B1 [patent_app_number] => 10/102421 [patent_app_country] => US [patent_app_date] => 2002-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9381 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/714/06714203.pdf [firstpage_image] =>[orig_patent_app_number] => 10102421 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/102421
Data aware clustered architecture for an image generator Mar 18, 2002 Issued
Array ( [id] => 6709877 [patent_doc_number] => 20030169626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-11 [patent_title] => 'System and method for controlling a number of outstanding data transactions within an integrated circuit' [patent_app_type] => new [patent_app_number] => 10/092016 [patent_app_country] => US [patent_app_date] => 2002-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7550 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20030169626.pdf [firstpage_image] =>[orig_patent_app_number] => 10092016 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/092016
System and method for controlling a number of outstanding data transactions within an integrated circuit Mar 5, 2002 Issued
Array ( [id] => 6845667 [patent_doc_number] => 20030164834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'System and method utilizing multiple pipelines to render graphical data' [patent_app_type] => new [patent_app_number] => 10/087429 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8533 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164834.pdf [firstpage_image] =>[orig_patent_app_number] => 10087429 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087429
System and method utilizing multiple pipelines to render graphical data Feb 28, 2002 Issued
Array ( [id] => 6845664 [patent_doc_number] => 20030164831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'System and method utilizing multiple processes to render graphical data' [patent_app_type] => new [patent_app_number] => 10/087472 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7544 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164831.pdf [firstpage_image] =>[orig_patent_app_number] => 10087472 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087472
System and method utilizing multiple processes to render graphical data Feb 28, 2002 Issued
Array ( [id] => 6845657 [patent_doc_number] => 20030164824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'Graphics engine with isochronous context switching' [patent_app_type] => new [patent_app_number] => 10/086981 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12530 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164824.pdf [firstpage_image] =>[orig_patent_app_number] => 10086981 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/086981
Graphics engine with isochronous context switching Feb 28, 2002 Issued
Array ( [id] => 6845656 [patent_doc_number] => 20030164823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => '3D graphics accelerator architecture' [patent_app_type] => new [patent_app_number] => 10/086979 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13061 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164823.pdf [firstpage_image] =>[orig_patent_app_number] => 10086979 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/086979
3D graphics accelerator architecture Feb 28, 2002 Abandoned
Array ( [id] => 6845658 [patent_doc_number] => 20030164825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'In-circuit test using scan chains' [patent_app_type] => new [patent_app_number] => 10/087654 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13637 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164825.pdf [firstpage_image] =>[orig_patent_app_number] => 10087654 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087654
In-circuit test using scan chains Feb 28, 2002 Issued
Array ( [id] => 1198483 [patent_doc_number] => 06727904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-27 [patent_title] => 'System and method for rendering graphical data' [patent_app_type] => B2 [patent_app_number] => 10/087151 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727904.pdf [firstpage_image] =>[orig_patent_app_number] => 10087151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087151
System and method for rendering graphical data Feb 28, 2002 Issued
Array ( [id] => 1122108 [patent_doc_number] => 06798421 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Same tile method' [patent_app_type] => B2 [patent_app_number] => 10/087233 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12741 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798421.pdf [firstpage_image] =>[orig_patent_app_number] => 10087233 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087233
Same tile method Feb 27, 2002 Issued
Array ( [id] => 748279 [patent_doc_number] => 07027064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Active block write-back from SRAM cache to DRAM' [patent_app_type] => utility [patent_app_number] => 10/086174 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/027/07027064.pdf [firstpage_image] =>[orig_patent_app_number] => 10086174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/086174
Active block write-back from SRAM cache to DRAM Feb 27, 2002 Issued
Array ( [id] => 6419501 [patent_doc_number] => 20020126126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Parameter circular buffers' [patent_app_type] => new [patent_app_number] => 10/085976 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12686 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20020126126.pdf [firstpage_image] =>[orig_patent_app_number] => 10085976 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/085976
Parameter circular buffers Feb 27, 2002 Issued
Array ( [id] => 6833247 [patent_doc_number] => 20030160792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Distributed resource architecture and system' [patent_app_type] => new [patent_app_number] => 10/086160 [patent_app_country] => US [patent_app_date] => 2002-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3478 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160792.pdf [firstpage_image] =>[orig_patent_app_number] => 10086160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/086160
Distributed resource architecture and system Feb 26, 2002 Issued
Array ( [id] => 1003256 [patent_doc_number] => 06909432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Centralized scalable resource architecture and system' [patent_app_type] => utility [patent_app_number] => 10/086060 [patent_app_country] => US [patent_app_date] => 2002-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3025 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909432.pdf [firstpage_image] =>[orig_patent_app_number] => 10086060 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/086060
Centralized scalable resource architecture and system Feb 26, 2002 Issued
Array ( [id] => 1134480 [patent_doc_number] => 06788303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Vector instruction set' [patent_app_type] => B2 [patent_app_number] => 10/085466 [patent_app_country] => US [patent_app_date] => 2002-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12884 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/788/06788303.pdf [firstpage_image] =>[orig_patent_app_number] => 10085466 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/085466
Vector instruction set Feb 26, 2002 Issued
Array ( [id] => 1147438 [patent_doc_number] => 06778177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Method for rasterizing a graphics basic component' [patent_app_type] => B1 [patent_app_number] => 09/958297 [patent_app_country] => US [patent_app_date] => 2002-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 9997 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/778/06778177.pdf [firstpage_image] =>[orig_patent_app_number] => 09958297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/958297
Method for rasterizing a graphics basic component Feb 18, 2002 Issued
Array ( [id] => 1051315 [patent_doc_number] => 06862028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Bin pointer and state caching apparatus and method' [patent_app_type] => utility [patent_app_number] => 10/074033 [patent_app_country] => US [patent_app_date] => 2002-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4056 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862028.pdf [firstpage_image] =>[orig_patent_app_number] => 10074033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/074033
Bin pointer and state caching apparatus and method Feb 13, 2002 Issued
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