Search

Jessica S. Manno

Supervisory Patent Examiner (ID: 4994, Phone: (571)272-2339 , Office: P/2828 )

Most Active Art Unit
2873
Art Unit(s)
2828, 2873, 2898
Total Applications
691
Issued Applications
505
Pending Applications
42
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1138487 [patent_doc_number] => 06784889 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Memory system and method for improved utilization of read and write bandwidth of a graphics processing system' [patent_app_type] => B1 [patent_app_number] => 09/736861 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3476 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784889.pdf [firstpage_image] =>[orig_patent_app_number] => 09736861 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/736861
Memory system and method for improved utilization of read and write bandwidth of a graphics processing system Dec 12, 2000 Issued
Array ( [id] => 6206356 [patent_doc_number] => 20020070941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Memory system having programmable multiple and continuous memory regions and method of use thereof' [patent_app_type] => new [patent_app_number] => 09/737231 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4376 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070941.pdf [firstpage_image] =>[orig_patent_app_number] => 09737231 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737231
Memory system having programmable multiple and continuous memory regions and method of use thereof Dec 12, 2000 Issued
Array ( [id] => 1103759 [patent_doc_number] => 06816165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Memory system having multiple address allocation formats and method for use thereof' [patent_app_type] => B1 [patent_app_number] => 09/736851 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3926 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/816/06816165.pdf [firstpage_image] =>[orig_patent_app_number] => 09736851 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/736851
Memory system having multiple address allocation formats and method for use thereof Dec 12, 2000 Issued
Array ( [id] => 6271408 [patent_doc_number] => 20020105522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Embedded memory architecture for video applications' [patent_app_type] => new [patent_app_number] => 09/681053 [patent_app_country] => US [patent_app_date] => 2000-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6356 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20020105522.pdf [firstpage_image] =>[orig_patent_app_number] => 09681053 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/681053
Embedded memory architecture for video applications Dec 11, 2000 Abandoned
Array ( [id] => 6599617 [patent_doc_number] => 20020063717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => 'System and method for editing digital images using inductive image generation with cached state-specific image tiles' [patent_app_type] => new [patent_app_number] => 09/727403 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8071 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20020063717.pdf [firstpage_image] =>[orig_patent_app_number] => 09727403 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727403
System and method for editing digital images using inductive image generation with cached state-specific image tiles Nov 29, 2000 Issued
09/716579 System for managing texture mapping data in a computer graphics system Nov 19, 2000 Abandoned
Array ( [id] => 1129656 [patent_doc_number] => 06791553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'System and method for efficiently rendering a jitter enhanced graphical image' [patent_app_type] => B1 [patent_app_number] => 09/715253 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 21290 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791553.pdf [firstpage_image] =>[orig_patent_app_number] => 09715253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715253
System and method for efficiently rendering a jitter enhanced graphical image Nov 16, 2000 Issued
Array ( [id] => 1048032 [patent_doc_number] => 06864894 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Single logical screen system and method for rendering graphical data' [patent_app_type] => utility [patent_app_number] => 09/715746 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 21310 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864894.pdf [firstpage_image] =>[orig_patent_app_number] => 09715746 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715746
Single logical screen system and method for rendering graphical data Nov 16, 2000 Issued
Array ( [id] => 1029068 [patent_doc_number] => 06882346 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-19 [patent_title] => 'System and method for efficiently rendering graphical data' [patent_app_type] => utility [patent_app_number] => 09/715335 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 21306 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/882/06882346.pdf [firstpage_image] =>[orig_patent_app_number] => 09715335 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715335
System and method for efficiently rendering graphical data Nov 16, 2000 Issued
Array ( [id] => 1041647 [patent_doc_number] => 06870539 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-22 [patent_title] => 'Systems for compositing graphical data' [patent_app_type] => utility [patent_app_number] => 09/715892 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 21374 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870539.pdf [firstpage_image] =>[orig_patent_app_number] => 09715892 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715892
Systems for compositing graphical data Nov 16, 2000 Issued
Array ( [id] => 1147450 [patent_doc_number] => 06778178 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Memory range access flags for performance optimization' [patent_app_type] => B1 [patent_app_number] => 09/710943 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3594 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/778/06778178.pdf [firstpage_image] =>[orig_patent_app_number] => 09710943 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710943
Memory range access flags for performance optimization Nov 12, 2000 Issued
Array ( [id] => 1081884 [patent_doc_number] => 06836273 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Memory management method, image coding method, image decoding method, image display method, memory management apparatus, and memory management program storage medium' [patent_app_type] => B1 [patent_app_number] => 09/709422 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 43 [patent_no_of_words] => 23039 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836273.pdf [firstpage_image] =>[orig_patent_app_number] => 09709422 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/709422
Memory management method, image coding method, image decoding method, image display method, memory management apparatus, and memory management program storage medium Nov 12, 2000 Issued
Array ( [id] => 1153629 [patent_doc_number] => 06774903 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-10 [patent_title] => 'Palette anti-sparkle enhancement' [patent_app_type] => B1 [patent_app_number] => 09/707037 [patent_app_country] => US [patent_app_date] => 2000-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4181 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774903.pdf [firstpage_image] =>[orig_patent_app_number] => 09707037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/707037
Palette anti-sparkle enhancement Nov 5, 2000 Issued
Array ( [id] => 1156030 [patent_doc_number] => 06771270 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Graphics memory system that utilizes a variable width, stall-free object builder for coalescing and aligning read data' [patent_app_type] => B1 [patent_app_number] => 09/697655 [patent_app_country] => US [patent_app_date] => 2000-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3596 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/771/06771270.pdf [firstpage_image] =>[orig_patent_app_number] => 09697655 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/697655
Graphics memory system that utilizes a variable width, stall-free object builder for coalescing and aligning read data Oct 25, 2000 Issued
Array ( [id] => 735832 [patent_doc_number] => 07038692 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-02 [patent_title] => 'Method and apparatus for providing a vertex cache' [patent_app_type] => utility [patent_app_number] => 10/042733 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038692.pdf [firstpage_image] =>[orig_patent_app_number] => 10042733 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/042733
Method and apparatus for providing a vertex cache Oct 24, 2000 Issued
Array ( [id] => 1060866 [patent_doc_number] => 06853382 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-08 [patent_title] => 'Controller for a memory system having multiple partitions' [patent_app_type] => utility [patent_app_number] => 09/687453 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5073 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853382.pdf [firstpage_image] =>[orig_patent_app_number] => 09687453 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/687453
Controller for a memory system having multiple partitions Oct 12, 2000 Issued
Array ( [id] => 1126244 [patent_doc_number] => 06795075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Graphic processor having multiple geometric operation units and method of processing data thereby' [patent_app_type] => B1 [patent_app_number] => 09/685895 [patent_app_country] => US [patent_app_date] => 2000-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 6252 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795075.pdf [firstpage_image] =>[orig_patent_app_number] => 09685895 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/685895
Graphic processor having multiple geometric operation units and method of processing data thereby Oct 10, 2000 Issued
Array ( [id] => 1313087 [patent_doc_number] => 06618053 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Asynchronous multilevel texture pipeline' [patent_app_type] => B1 [patent_app_number] => 09/684315 [patent_app_country] => US [patent_app_date] => 2000-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6387 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618053.pdf [firstpage_image] =>[orig_patent_app_number] => 09684315 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/684315
Asynchronous multilevel texture pipeline Oct 5, 2000 Issued
Array ( [id] => 1138500 [patent_doc_number] => 06784892 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Fully associative texture cache having content addressable memory and method for use thereof' [patent_app_type] => B1 [patent_app_number] => 09/684168 [patent_app_country] => US [patent_app_date] => 2000-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2827 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784892.pdf [firstpage_image] =>[orig_patent_app_number] => 09684168 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/684168
Fully associative texture cache having content addressable memory and method for use thereof Oct 4, 2000 Issued
Array ( [id] => 7629029 [patent_doc_number] => 06819328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Graphic accelerator with interpolate function' [patent_app_type] => B1 [patent_app_number] => 09/676755 [patent_app_country] => US [patent_app_date] => 2000-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 10270 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819328.pdf [firstpage_image] =>[orig_patent_app_number] => 09676755 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/676755
Graphic accelerator with interpolate function Oct 1, 2000 Issued
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