Jhere M Rowland

Array ( [id] => 163590 [patent_doc_number] => 07671630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'USB 2.0 HS voltage-mode transmitter with tuned termination resistance' [patent_app_type] => utility [patent_app_number] => 11/192871 [patent_app_country] => US [patent_app_date] => 2005-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3737 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/671/07671630.pdf [firstpage_image] =>[orig_patent_app_number] => 11192871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 901260 [patent_doc_number] => 07339397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'Data output apparatus and method' [patent_app_type] => utility [patent_app_number] => 11/176345 [patent_app_country] => US [patent_app_date] => 2005-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2454 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/339/07339397.pdf [firstpage_image] =>[orig_patent_app_number] => 11176345 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 873741 [patent_doc_number] => 07362128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Programmable impedance control circuit in semiconductor device and impedance range shifting method thereof' [patent_app_type] => utility [patent_app_number] => 11/153755 [patent_app_country] => US [patent_app_date] => 2005-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 3871 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/362/07362128.pdf [firstpage_image] =>[orig_patent_app_number] => 11153755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 229400 [patent_doc_number] => 07602215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-13 [patent_title] => 'Shift register and semiconductor display device' [patent_app_type] => utility [patent_app_number] => 11/629091 [patent_app_country] => US [patent_app_date] => 2005-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9208 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/602/07602215.pdf [firstpage_image] =>[orig_patent_app_number] => 11629091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 583812 [patent_doc_number] => 07456655 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-25 [patent_title] => 'System and process for overcoming wire-bond originated cross-talk' [patent_app_type] => utility [patent_app_number] => 11/129392 [patent_app_country] => US [patent_app_date] => 2005-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6646 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/456/07456655.pdf [firstpage_image] =>[orig_patent_app_number] => 11129392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5606116 [patent_doc_number] => 20060267632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Method and apparatus for buffering bi-directional open drain signal lines' [patent_app_type] => utility [patent_app_number] => 11/128424 [patent_app_country] => US [patent_app_date] => 2005-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6167 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20060267632.pdf [firstpage_image] =>[orig_patent_app_number] => 11128424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5869790 [patent_doc_number] => 20060164122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Level shifter' [patent_app_type] => utility [patent_app_number] => 11/128316 [patent_app_country] => US [patent_app_date] => 2005-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3723 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20060164122.pdf [firstpage_image] =>[orig_patent_app_number] => 11128316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 565625 [patent_doc_number] => 07471107 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-30 [patent_title] => 'Active biasing in metal oxide semiconductor (MOS) differential pairs' [patent_app_type] => utility [patent_app_number] => 11/128953 [patent_app_country] => US [patent_app_date] => 2005-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13116 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/471/07471107.pdf [firstpage_image] =>[orig_patent_app_number] => 11128953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5640880 [patent_doc_number] => 20060279335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Phase interpolator driver' [patent_app_type] => utility [patent_app_number] => 11/125537 [patent_app_country] => US [patent_app_date] => 2005-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2085 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20060279335.pdf [firstpage_image] =>[orig_patent_app_number] => 11125537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 353164 [patent_doc_number] => 07492190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Semiconductor memory device capable of adjusting effective data period' [patent_app_type] => utility [patent_app_number] => 11/124317 [patent_app_country] => US [patent_app_date] => 2005-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3263 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/492/07492190.pdf [firstpage_image] =>[orig_patent_app_number] => 11124317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 422279 [patent_doc_number] => 07274213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-25 [patent_title] => 'Method and apparatus for automatic protocol generation' [patent_app_type] => utility [patent_app_number] => 11/123498 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4814 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/274/07274213.pdf [firstpage_image] =>[orig_patent_app_number] => 11123498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 394472 [patent_doc_number] => 07298173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-20 [patent_title] => 'Slew rate control circuit for small computer system interface (SCSI) differential driver' [patent_app_type] => utility [patent_app_number] => 11/122444 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5045 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/298/07298173.pdf [firstpage_image] =>[orig_patent_app_number] => 11122444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 465877 [patent_doc_number] => 07239182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Predriver circuit' [patent_app_type] => utility [patent_app_number] => 11/122908 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4936 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239182.pdf [firstpage_image] =>[orig_patent_app_number] => 11122908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5640870 [patent_doc_number] => 20060279325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Input circuit for mode setting' [patent_app_type] => utility [patent_app_number] => 11/119899 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5956 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20060279325.pdf [firstpage_image] =>[orig_patent_app_number] => 11119899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 830615 [patent_doc_number] => 07400171 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-15 [patent_title] => 'Electronic switch having extended voltage range' [patent_app_type] => utility [patent_app_number] => 11/121326 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2841 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/400/07400171.pdf [firstpage_image] =>[orig_patent_app_number] => 11121326 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 401825 [patent_doc_number] => 07292062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-06 [patent_title] => 'Distribution of signals throughout a spine of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/118374 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4466 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/292/07292062.pdf [firstpage_image] =>[orig_patent_app_number] => 11118374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 458277 [patent_doc_number] => 07245152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Voltage-level shifter' [patent_app_type] => utility [patent_app_number] => 11/119638 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2529 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245152.pdf [firstpage_image] =>[orig_patent_app_number] => 11119638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 401826 [patent_doc_number] => 07292063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-06 [patent_title] => 'Method of interconnect for multi-slot metal-mask programmable relocatable function placed in an I/O region' [patent_app_type] => utility [patent_app_number] => 11/120067 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3749 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/292/07292063.pdf [firstpage_image] =>[orig_patent_app_number] => 11120067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 387127 [patent_doc_number] => 07304497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Methods and apparatus for programmably powering down structured application-specific integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/119312 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6028 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/304/07304497.pdf [firstpage_image] =>[orig_patent_app_number] => 11119312 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 817608 [patent_doc_number] => 07411416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Technology for supressing noise of data bus circuit' [patent_app_type] => utility [patent_app_number] => 11/117611 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1875 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/411/07411416.pdf [firstpage_image] =>[orig_patent_app_number] => 11117611 [rel_patent_id] =>[rel_patent_doc_number] =>)