
Ji H. Bae
Examiner (ID: 6530, Phone: (571)272-7181 , Office: P/2115 )
| Most Active Art Unit | 2115 |
| Art Unit(s) | 2115, 2187, 2118, 2176 |
| Total Applications | 971 |
| Issued Applications | 764 |
| Pending Applications | 63 |
| Abandoned Applications | 165 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17083882
[patent_doc_number] => 20210278888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-09
[patent_title] => Information Processing System And Information Processing Apparatus
[patent_app_type] => utility
[patent_app_number] => 17/189311
[patent_app_country] => US
[patent_app_date] => 2021-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9878
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189311
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/189311 | Information Processing System And Information Processing Apparatus | Mar 1, 2021 | Abandoned |
Array
(
[id] => 17877107
[patent_doc_number] => 11449120
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-20
[patent_title] => Centralized power management of wireless devices
[patent_app_type] => utility
[patent_app_number] => 17/174854
[patent_app_country] => US
[patent_app_date] => 2021-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 10747
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174854
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/174854 | Centralized power management of wireless devices | Feb 11, 2021 | Issued |
Array
(
[id] => 17023964
[patent_doc_number] => 20210247835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-12
[patent_title] => IMAGE PROCESSING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/172237
[patent_app_country] => US
[patent_app_date] => 2021-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172237
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/172237 | Power control for a controlled device and communication relay unit of an image processing apparatus | Feb 9, 2021 | Issued |
Array
(
[id] => 18174193
[patent_doc_number] => 11573905
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-07
[patent_title] => Saving page retire information persistently across operating system reboots
[patent_app_type] => utility
[patent_app_number] => 17/154411
[patent_app_country] => US
[patent_app_date] => 2021-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6707
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17154411
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/154411 | Saving page retire information persistently across operating system reboots | Jan 20, 2021 | Issued |
Array
(
[id] => 18855561
[patent_doc_number] => 11853139
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Clock and data signal transmission in a master/slave PMIC system
[patent_app_type] => utility
[patent_app_number] => 17/142424
[patent_app_country] => US
[patent_app_date] => 2021-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3853
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142424
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/142424 | Clock and data signal transmission in a master/slave PMIC system | Jan 5, 2021 | Issued |
Array
(
[id] => 17700832
[patent_doc_number] => 11374568
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-28
[patent_title] => Semiconductor apparatus including power gating circuits
[patent_app_type] => utility
[patent_app_number] => 17/141934
[patent_app_country] => US
[patent_app_date] => 2021-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7678
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17141934
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/141934 | Semiconductor apparatus including power gating circuits | Jan 4, 2021 | Issued |
Array
(
[id] => 17690563
[patent_doc_number] => 20220197856
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => System, Apparatus And Method For Dynamically Configuring One Or More Hardware Resources Of A Processor
[patent_app_type] => utility
[patent_app_number] => 17/130012
[patent_app_country] => US
[patent_app_date] => 2020-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11281
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130012
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/130012 | System, apparatus and method for dynamically configuring one or more hardware resources of a processor | Dec 21, 2020 | Issued |
Array
(
[id] => 17690563
[patent_doc_number] => 20220197856
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => System, Apparatus And Method For Dynamically Configuring One Or More Hardware Resources Of A Processor
[patent_app_type] => utility
[patent_app_number] => 17/130012
[patent_app_country] => US
[patent_app_date] => 2020-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11281
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130012
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/130012 | System, apparatus and method for dynamically configuring one or more hardware resources of a processor | Dec 21, 2020 | Issued |
Array
(
[id] => 17773079
[patent_doc_number] => 11405037
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Driver circuit of voltage translator
[patent_app_type] => utility
[patent_app_number] => 17/247654
[patent_app_country] => US
[patent_app_date] => 2020-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8172
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17247654
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/247654 | Driver circuit of voltage translator | Dec 17, 2020 | Issued |
Array
(
[id] => 17674721
[patent_doc_number] => 20220187888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-16
[patent_title] => CONFIGURABLE VRM CARD
[patent_app_type] => utility
[patent_app_number] => 17/120139
[patent_app_country] => US
[patent_app_date] => 2020-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12459
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17120139
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/120139 | Configurable VRM card | Dec 11, 2020 | Issued |
Array
(
[id] => 18135898
[patent_doc_number] => 11561570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-24
[patent_title] => Apparatus and methods for low power frequency clock generation and distribution
[patent_app_type] => utility
[patent_app_number] => 17/108152
[patent_app_country] => US
[patent_app_date] => 2020-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 9206
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108152
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/108152 | Apparatus and methods for low power frequency clock generation and distribution | Nov 30, 2020 | Issued |
Array
(
[id] => 17715256
[patent_doc_number] => 11379247
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-05
[patent_title] => Methods and systems for comparing computer configuration information
[patent_app_type] => utility
[patent_app_number] => 17/104799
[patent_app_country] => US
[patent_app_date] => 2020-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3616
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104799
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/104799 | Methods and systems for comparing computer configuration information | Nov 24, 2020 | Issued |
Array
(
[id] => 18111327
[patent_doc_number] => 20230004207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-05
[patent_title] => CONTROL DEVICE AND DATA PROCESSING SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/781172
[patent_app_country] => US
[patent_app_date] => 2020-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 41420
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17781172
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/781172 | Control device and data processing system | Nov 24, 2020 | Issued |
Array
(
[id] => 17580832
[patent_doc_number] => 20220137687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => TWO-STAGE DYNAMIC POWER SUPPLY VOLTAGE ADJUSTMENT
[patent_app_type] => utility
[patent_app_number] => 17/085505
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6717
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085505
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/085505 | Two-stage dynamic power supply voltage adjustment | Oct 29, 2020 | Issued |
Array
(
[id] => 16625488
[patent_doc_number] => 20210044141
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-11
[patent_title] => PARALLEL OUTPUT OF BACKUP POWER MODULES
[patent_app_type] => utility
[patent_app_number] => 17/077002
[patent_app_country] => US
[patent_app_date] => 2020-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3895
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077002
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/077002 | PARALLEL OUTPUT OF BACKUP POWER MODULES | Oct 21, 2020 | Abandoned |
Array
(
[id] => 17552321
[patent_doc_number] => 20220123664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-21
[patent_title] => POWER SUPPLY UNITS AND METHODS FOR MANAGING OPERATION OF SAME
[patent_app_type] => utility
[patent_app_number] => 17/073260
[patent_app_country] => US
[patent_app_date] => 2020-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6190
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17073260
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/073260 | System and method for detecting the presence of input power of different types | Oct 15, 2020 | Issued |
Array
(
[id] => 18493253
[patent_doc_number] => 11698668
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-11
[patent_title] => Information processing apparatus and control method for selectively supplying power and clocks to module circuits used for verification
[patent_app_type] => utility
[patent_app_number] => 17/067224
[patent_app_country] => US
[patent_app_date] => 2020-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9611
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17067224
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/067224 | Information processing apparatus and control method for selectively supplying power and clocks to module circuits used for verification | Oct 8, 2020 | Issued |
Array
(
[id] => 16856644
[patent_doc_number] => 20210157389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => STANDBY CURRENT REDUCTION IN MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/034154
[patent_app_country] => US
[patent_app_date] => 2020-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4932
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17034154
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/034154 | Standby current reduction in memory devices | Sep 27, 2020 | Issued |
Array
(
[id] => 19122269
[patent_doc_number] => 11966251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-23
[patent_title] => Device for generating a supply/bias voltage and a clock signal for a synchronous digital circuit
[patent_app_type] => utility
[patent_app_number] => 17/765749
[patent_app_country] => US
[patent_app_date] => 2020-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 22
[patent_no_of_words] => 13316
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17765749
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/765749 | Device for generating a supply/bias voltage and a clock signal for a synchronous digital circuit | Sep 27, 2020 | Issued |
Array
(
[id] => 17325397
[patent_doc_number] => 11216409
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-04
[patent_title] => Providing access from outside a multicore processor SoC to individually configure voltages
[patent_app_type] => utility
[patent_app_number] => 17/025992
[patent_app_country] => US
[patent_app_date] => 2020-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5686
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025992
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/025992 | Providing access from outside a multicore processor SoC to individually configure voltages | Sep 17, 2020 | Issued |