Search

Ji H. Bae

Examiner (ID: 11054, Phone: (571)272-7181 , Office: P/2115 )

Most Active Art Unit
2115
Art Unit(s)
2187, 2115, 2176, 2118
Total Applications
984
Issued Applications
775
Pending Applications
53
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6511446 [patent_doc_number] => 20100095139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'DOCKING STATION' [patent_app_type] => utility [patent_app_number] => 12/450886 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5481 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20100095139.pdf [firstpage_image] =>[orig_patent_app_number] => 12450886 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/450886
DOCKING STATION Apr 23, 2008 Abandoned
Array ( [id] => 4499868 [patent_doc_number] => 07904737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Remote control save and sleep override' [patent_app_type] => utility [patent_app_number] => 12/049283 [patent_app_country] => US [patent_app_date] => 2008-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904737.pdf [firstpage_image] =>[orig_patent_app_number] => 12049283 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/049283
Remote control save and sleep override Mar 14, 2008 Issued
Array ( [id] => 7798451 [patent_doc_number] => 08127169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Semiconductor memory device and method for generating internal control signal' [patent_app_type] => utility [patent_app_number] => 12/000043 [patent_app_country] => US [patent_app_date] => 2007-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/127/08127169.pdf [firstpage_image] =>[orig_patent_app_number] => 12000043 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/000043
Semiconductor memory device and method for generating internal control signal Dec 6, 2007 Issued
Array ( [id] => 8001183 [patent_doc_number] => 08082439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Firmware modification in a computer system environment supporting operational state changes' [patent_app_type] => utility [patent_app_number] => 11/999624 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5437 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/082/08082439.pdf [firstpage_image] =>[orig_patent_app_number] => 11999624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/999624
Firmware modification in a computer system environment supporting operational state changes Dec 5, 2007 Issued
Array ( [id] => 4956514 [patent_doc_number] => 20080189538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Supporting multiple operating systems in media devices' [patent_app_type] => utility [patent_app_number] => 11/999605 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20080189538.pdf [firstpage_image] =>[orig_patent_app_number] => 11999605 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/999605
Supporting multiple operating systems in media devices Dec 5, 2007 Issued
Array ( [id] => 8355010 [patent_doc_number] => 08250353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Firmware exclusive access of a peripheral storage device' [patent_app_type] => utility [patent_app_number] => 11/998281 [patent_app_country] => US [patent_app_date] => 2007-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3984 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11998281 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/998281
Firmware exclusive access of a peripheral storage device Nov 28, 2007 Issued
Array ( [id] => 4479407 [patent_doc_number] => 07945804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Methods and systems for digitally controlled multi-frequency clocking of multi-core processors' [patent_app_type] => utility [patent_app_number] => 11/873458 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5284 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/945/07945804.pdf [firstpage_image] =>[orig_patent_app_number] => 11873458 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/873458
Methods and systems for digitally controlled multi-frequency clocking of multi-core processors Oct 16, 2007 Issued
Array ( [id] => 4706395 [patent_doc_number] => 20080065919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'METHOD AND COMPUTER PROGRAM FOR REDUCING POWER CONSUMPTION OF A COMPUTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/866896 [patent_app_country] => US [patent_app_date] => 2007-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 10057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20080065919.pdf [firstpage_image] =>[orig_patent_app_number] => 11866896 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/866896
Method, computing system, and computer program for reducing power consumption of a computing system by relocating jobs and deactivating idle servers Oct 2, 2007 Issued
Array ( [id] => 4702333 [patent_doc_number] => 20080061855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'METHOD AND APPARATUS FOR GENERATING A CLOCK SIGNAL AND FOR CONTROLLING A CLOCK FREQUENCY USING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/853087 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6603 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20080061855.pdf [firstpage_image] =>[orig_patent_app_number] => 11853087 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853087
METHOD AND APPARATUS FOR GENERATING A CLOCK SIGNAL AND FOR CONTROLLING A CLOCK FREQUENCY USING THE SAME Sep 10, 2007 Abandoned
Array ( [id] => 7525009 [patent_doc_number] => 08028179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Determining expected exceeding of maximum allowed power consumption of a mobile electronic device' [patent_app_type] => utility [patent_app_number] => 11/853164 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6244 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/028/08028179.pdf [firstpage_image] =>[orig_patent_app_number] => 11853164 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853164
Determining expected exceeding of maximum allowed power consumption of a mobile electronic device Sep 10, 2007 Issued
Array ( [id] => 5454535 [patent_doc_number] => 20090070572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'METHOD AND APPARATUS FOR PORTABLE COMPUTING ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 11/853060 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5295 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070572.pdf [firstpage_image] =>[orig_patent_app_number] => 11853060 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853060
METHOD AND APPARATUS FOR PORTABLE COMPUTING ENVIRONMENT Sep 10, 2007 Abandoned
Array ( [id] => 7993165 [patent_doc_number] => 08078890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'System and method for providing memory performance states in a computing system' [patent_app_type] => utility [patent_app_number] => 11/853255 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2948 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/078/08078890.pdf [firstpage_image] =>[orig_patent_app_number] => 11853255 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853255
System and method for providing memory performance states in a computing system Sep 10, 2007 Issued
Array ( [id] => 5454577 [patent_doc_number] => 20090070614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'METHOD AND SYSTEM FOR ENABLING AND DISABLING HARDWARE BASED ON RESERVATIONS AND USAGE HISTORY' [patent_app_type] => utility [patent_app_number] => 11/853380 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070614.pdf [firstpage_image] =>[orig_patent_app_number] => 11853380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853380
Method and system for enabling and disabling hardware based on reservations and usage history Sep 10, 2007 Issued
Array ( [id] => 4508240 [patent_doc_number] => 07958344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Method for adjusting set-up default value of bios and mainboard using the same method' [patent_app_type] => utility [patent_app_number] => 11/852512 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3573 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/958/07958344.pdf [firstpage_image] =>[orig_patent_app_number] => 11852512 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/852512
Method for adjusting set-up default value of bios and mainboard using the same method Sep 9, 2007 Issued
Array ( [id] => 4744860 [patent_doc_number] => 20080089462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'TIMER CIRCUIT AND SIGNAL PROCESSING CIRCUIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/851201 [patent_app_country] => US [patent_app_date] => 2007-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6566 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20080089462.pdf [firstpage_image] =>[orig_patent_app_number] => 11851201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/851201
TIMER CIRCUIT AND SIGNAL PROCESSING CIRCUIT INCLUDING THE SAME Sep 5, 2007 Abandoned
Array ( [id] => 7532577 [patent_doc_number] => 07844811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Using chip select to specify boot memory' [patent_app_type] => utility [patent_app_number] => 11/895156 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4852 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/844/07844811.pdf [firstpage_image] =>[orig_patent_app_number] => 11895156 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/895156
Using chip select to specify boot memory Aug 22, 2007 Issued
Array ( [id] => 5231170 [patent_doc_number] => 20070293278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'CIRCUIT AND OPERATING METHOD FOR INTEGRATED INTERFACE OF PDA AND WIRELESS COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/844347 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4913 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20070293278.pdf [firstpage_image] =>[orig_patent_app_number] => 11844347 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844347
Circuit and operating method for integrated interface of PDA and wireless communication system Aug 22, 2007 Issued
Array ( [id] => 66512 [patent_doc_number] => 07765414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Circuit and operating method for integrated interface of PDA and wireless communication system' [patent_app_type] => utility [patent_app_number] => 11/844349 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5812 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/765/07765414.pdf [firstpage_image] =>[orig_patent_app_number] => 11844349 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844349
Circuit and operating method for integrated interface of PDA and wireless communication system Aug 22, 2007 Issued
Array ( [id] => 4581710 [patent_doc_number] => 07840823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Processor system for varying clock frequency and voltage in response to a comparison of instruction execution rate to a reference value' [patent_app_type] => utility [patent_app_number] => 11/892340 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3938 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/840/07840823.pdf [firstpage_image] =>[orig_patent_app_number] => 11892340 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/892340
Processor system for varying clock frequency and voltage in response to a comparison of instruction execution rate to a reference value Aug 21, 2007 Issued
Array ( [id] => 4945460 [patent_doc_number] => 20080082787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Delay circuit and processor' [patent_app_type] => utility [patent_app_number] => 11/892210 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9501 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20080082787.pdf [firstpage_image] =>[orig_patent_app_number] => 11892210 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/892210
Delay circuit and processor Aug 20, 2007 Abandoned
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