Search

Ji H. Bae

Examiner (ID: 10973, Phone: (571)272-7181 , Office: P/2115 )

Most Active Art Unit
2115
Art Unit(s)
2176, 2118, 2187, 2115
Total Applications
982
Issued Applications
775
Pending Applications
52
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4530619 [patent_doc_number] => 07913099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Dynamic processor operating voltage control in response to a change in a core/bus clock frequency ratio' [patent_app_type] => utility [patent_app_number] => 11/890931 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1985 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913099.pdf [firstpage_image] =>[orig_patent_app_number] => 11890931 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/890931
Dynamic processor operating voltage control in response to a change in a core/bus clock frequency ratio Aug 7, 2007 Issued
Array ( [id] => 4653343 [patent_doc_number] => 20080040600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'System and Method for Reducing Instability In An Information Handling System' [patent_app_type] => utility [patent_app_number] => 11/834116 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5116 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20080040600.pdf [firstpage_image] =>[orig_patent_app_number] => 11834116 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834116
System and method for reducing instability in an information handling system Aug 5, 2007 Issued
Array ( [id] => 4470078 [patent_doc_number] => 07882376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Power control for a core circuit area of a semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/782006 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4369 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/882/07882376.pdf [firstpage_image] =>[orig_patent_app_number] => 11782006 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782006
Power control for a core circuit area of a semiconductor integrated circuit device Jul 23, 2007 Issued
Array ( [id] => 4881912 [patent_doc_number] => 20080155295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SYNCHRONIZATION CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 11/782053 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7694 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20080155295.pdf [firstpage_image] =>[orig_patent_app_number] => 11782053 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782053
SYNCHRONIZATION CONTROL APPARATUS Jul 23, 2007 Abandoned
Array ( [id] => 5523166 [patent_doc_number] => 20090031147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'APPARATUS FOR WAKING UP A DEVICE' [patent_app_type] => utility [patent_app_number] => 11/782100 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2520 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20090031147.pdf [firstpage_image] =>[orig_patent_app_number] => 11782100 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782100
APPARATUS FOR WAKING UP A DEVICE Jul 23, 2007 Abandoned
Array ( [id] => 5012706 [patent_doc_number] => 20070283185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'DIGITAL RELIABILITY MONITOR HAVING AUTONOMIC REPAIR AND NOTIFICATION CAPABILITY' [patent_app_type] => utility [patent_app_number] => 11/772418 [patent_app_country] => US [patent_app_date] => 2007-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4620 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20070283185.pdf [firstpage_image] =>[orig_patent_app_number] => 11772418 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772418
Digital reliability monitor having autonomic repair and notification capability Jul 1, 2007 Issued
Array ( [id] => 321392 [patent_doc_number] => 07523329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-21 [patent_title] => 'Apparatus for and method of reducing power consumption in a cable modem' [patent_app_type] => utility [patent_app_number] => 11/764914 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6486 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/523/07523329.pdf [firstpage_image] =>[orig_patent_app_number] => 11764914 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/764914
Apparatus for and method of reducing power consumption in a cable modem Jun 18, 2007 Issued
Array ( [id] => 157882 [patent_doc_number] => 07685442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Method and systems for a radiation tolerant bus interface circuit' [patent_app_type] => utility [patent_app_number] => 11/740386 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9611 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/685/07685442.pdf [firstpage_image] =>[orig_patent_app_number] => 11740386 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740386
Method and systems for a radiation tolerant bus interface circuit Apr 25, 2007 Issued
Array ( [id] => 4862303 [patent_doc_number] => 20080270811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Fast Suspend-Resume of Computer Motherboard Using Phase-Change Memory' [patent_app_type] => utility [patent_app_number] => 11/740398 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20080270811.pdf [firstpage_image] =>[orig_patent_app_number] => 11740398 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740398
Fast Suspend-Resume of Computer Motherboard Using Phase-Change Memory Apr 25, 2007 Abandoned
Array ( [id] => 4592070 [patent_doc_number] => 07836324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Oversampling-based scheme for synchronous interface communication' [patent_app_type] => utility [patent_app_number] => 11/740452 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6652 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/836/07836324.pdf [firstpage_image] =>[orig_patent_app_number] => 11740452 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740452
Oversampling-based scheme for synchronous interface communication Apr 25, 2007 Issued
Array ( [id] => 4895334 [patent_doc_number] => 20080104434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'SOC with low power and performance modes' [patent_app_type] => utility [patent_app_number] => 11/789760 [patent_app_country] => US [patent_app_date] => 2007-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4019 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20080104434.pdf [firstpage_image] =>[orig_patent_app_number] => 11789760 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/789760
SOC with low power and performance modes Apr 24, 2007 Issued
Array ( [id] => 4862318 [patent_doc_number] => 20080270816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Portable data storage apparatus and synchronization method for the same' [patent_app_type] => utility [patent_app_number] => 11/790318 [patent_app_country] => US [patent_app_date] => 2007-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3285 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20080270816.pdf [firstpage_image] =>[orig_patent_app_number] => 11790318 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790318
Portable data storage apparatus and synchronization method for the same Apr 24, 2007 Abandoned
Array ( [id] => 4895333 [patent_doc_number] => 20080104433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'System on a chip with RTC power supply' [patent_app_type] => utility [patent_app_number] => 11/789763 [patent_app_country] => US [patent_app_date] => 2007-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4144 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20080104433.pdf [firstpage_image] =>[orig_patent_app_number] => 11789763 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/789763
System on a chip with RTC power supply Apr 24, 2007 Issued
Array ( [id] => 9254 [patent_doc_number] => 07814356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal' [patent_app_type] => utility [patent_app_number] => 11/790260 [patent_app_country] => US [patent_app_date] => 2007-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5917 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/814/07814356.pdf [firstpage_image] =>[orig_patent_app_number] => 11790260 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790260
Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal Apr 23, 2007 Issued
Array ( [id] => 9250 [patent_doc_number] => 07814352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Selective connection of a memory to either a gateway card or information processor based on the power mode' [patent_app_type] => utility [patent_app_number] => 11/783786 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 12209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/814/07814352.pdf [firstpage_image] =>[orig_patent_app_number] => 11783786 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/783786
Selective connection of a memory to either a gateway card or information processor based on the power mode Apr 11, 2007 Issued
Array ( [id] => 4665475 [patent_doc_number] => 20080256382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'METHOD AND SYSTEM FOR DIGITAL FREQUENCY CLOCKING IN PROCESSOR CORES' [patent_app_type] => utility [patent_app_number] => 11/734375 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3845 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20080256382.pdf [firstpage_image] =>[orig_patent_app_number] => 11734375 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734375
Method and system for digital frequency clocking in processor cores Apr 11, 2007 Issued
Array ( [id] => 8120183 [patent_doc_number] => 08161314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Method and system for analog frequency clocking in processor cores' [patent_app_type] => utility [patent_app_number] => 11/734334 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4074 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161314.pdf [firstpage_image] =>[orig_patent_app_number] => 11734334 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734334
Method and system for analog frequency clocking in processor cores Apr 11, 2007 Issued
Array ( [id] => 68978 [patent_doc_number] => 07761721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'System of integrated environmentally hardened architecture for space application' [patent_app_type] => utility [patent_app_number] => 11/734482 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/761/07761721.pdf [firstpage_image] =>[orig_patent_app_number] => 11734482 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734482
System of integrated environmentally hardened architecture for space application Apr 11, 2007 Issued
Array ( [id] => 4522371 [patent_doc_number] => 07917741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Enhancing security of a system via access by an embedded controller to a secure storage device' [patent_app_type] => utility [patent_app_number] => 11/733599 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5388 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/917/07917741.pdf [firstpage_image] =>[orig_patent_app_number] => 11733599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733599
Enhancing security of a system via access by an embedded controller to a secure storage device Apr 9, 2007 Issued
Array ( [id] => 4470068 [patent_doc_number] => 07882372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Method and system for controlling and monitoring an array of point-of-load regulators' [patent_app_type] => utility [patent_app_number] => 11/696449 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4050 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/882/07882372.pdf [firstpage_image] =>[orig_patent_app_number] => 11696449 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696449
Method and system for controlling and monitoring an array of point-of-load regulators Apr 3, 2007 Issued
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