
Jimmy Chou
Examiner (ID: 14719, Phone: (571)270-7107 , Office: P/3742 )
| Most Active Art Unit | 3761 |
| Art Unit(s) | 3761, 3742 |
| Total Applications | 974 |
| Issued Applications | 646 |
| Pending Applications | 108 |
| Abandoned Applications | 256 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6686335
[patent_doc_number] => 20030030058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-13
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/164636
[patent_app_country] => US
[patent_app_date] => 2002-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2939
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20030030058.pdf
[firstpage_image] =>[orig_patent_app_number] => 10164636
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164636 | Semiconductor device | Jun 9, 2002 | Abandoned |
Array
(
[id] => 380322
[patent_doc_number] => 07309898
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-12-18
[patent_title] => 'Method and apparatus for providing noise suppression in an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/063856
[patent_app_country] => US
[patent_app_date] => 2002-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1963
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/309/07309898.pdf
[firstpage_image] =>[orig_patent_app_number] => 10063856
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/063856 | Method and apparatus for providing noise suppression in an integrated circuit | May 19, 2002 | Issued |
Array
(
[id] => 6768111
[patent_doc_number] => 20030214051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-20
[patent_title] => 'Semiconductor package and method of preparing same'
[patent_app_type] => new
[patent_app_number] => 10/068755
[patent_app_country] => US
[patent_app_date] => 2002-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8866
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0214/20030214051.pdf
[firstpage_image] =>[orig_patent_app_number] => 10068755
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/068755 | Semiconductor package and method of preparing same | May 15, 2002 | Issued |
Array
(
[id] => 1241518
[patent_doc_number] => 06683341
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-27
[patent_title] => 'Voltage-variable capacitor with increased current conducting perimeter'
[patent_app_type] => B1
[patent_app_number] => 10/144185
[patent_app_country] => US
[patent_app_date] => 2002-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 6268
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/683/06683341.pdf
[firstpage_image] =>[orig_patent_app_number] => 10144185
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/144185 | Voltage-variable capacitor with increased current conducting perimeter | May 9, 2002 | Issued |
Array
(
[id] => 1314077
[patent_doc_number] => 06614051
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-02
[patent_title] => 'Device for monitoring substrate charging and method of fabricating same'
[patent_app_type] => B1
[patent_app_number] => 10/144056
[patent_app_country] => US
[patent_app_date] => 2002-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 38
[patent_no_of_words] => 8169
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/614/06614051.pdf
[firstpage_image] =>[orig_patent_app_number] => 10144056
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/144056 | Device for monitoring substrate charging and method of fabricating same | May 9, 2002 | Issued |
Array
(
[id] => 6610877
[patent_doc_number] => 20030209731
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-13
[patent_title] => 'Circuit component placement'
[patent_app_type] => new
[patent_app_number] => 10/140965
[patent_app_country] => US
[patent_app_date] => 2002-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3658
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0209/20030209731.pdf
[firstpage_image] =>[orig_patent_app_number] => 10140965
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/140965 | Circuit component placement | May 7, 2002 | Issued |
Array
(
[id] => 6635533
[patent_doc_number] => 20030006463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-09
[patent_title] => 'Protection transistor with improved edge structure'
[patent_app_type] => new
[patent_app_number] => 10/140075
[patent_app_country] => US
[patent_app_date] => 2002-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7640
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20030006463.pdf
[firstpage_image] =>[orig_patent_app_number] => 10140075
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/140075 | Protection transistor with improved edge structure | May 7, 2002 | Issued |
Array
(
[id] => 6044396
[patent_doc_number] => 20020167062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Semiconductor device having a support structure'
[patent_app_type] => new
[patent_app_number] => 10/136155
[patent_app_country] => US
[patent_app_date] => 2002-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3436
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20020167062.pdf
[firstpage_image] =>[orig_patent_app_number] => 10136155
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/136155 | Semiconductor device having a support structure | Apr 30, 2002 | Abandoned |
Array
(
[id] => 6867646
[patent_doc_number] => 20030080335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-01
[patent_title] => 'Semiconductor device, and verification method for semiconductor testing apparatus and method using the semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/134385
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3159
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0080/20030080335.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134385
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134385 | Semiconductor device, and verification method for semiconductor testing apparatus and method using the semiconductor device | Apr 29, 2002 | Abandoned |
Array
(
[id] => 975971
[patent_doc_number] => 06933588
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-08-23
[patent_title] => 'High performance SCR-like BJT ESD protection structure'
[patent_app_type] => utility
[patent_app_number] => 10/134805
[patent_app_country] => US
[patent_app_date] => 2002-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2091
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/933/06933588.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134805
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134805 | High performance SCR-like BJT ESD protection structure | Apr 28, 2002 | Issued |
Array
(
[id] => 896355
[patent_doc_number] => 07342320
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-11
[patent_title] => 'Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and methods for producing an electronic component and an electronic assembly'
[patent_app_type] => utility
[patent_app_number] => 10/132826
[patent_app_country] => US
[patent_app_date] => 2002-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 6000
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/342/07342320.pdf
[firstpage_image] =>[orig_patent_app_number] => 10132826
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/132826 | Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and methods for producing an electronic component and an electronic assembly | Apr 24, 2002 | Issued |
Array
(
[id] => 5782930
[patent_doc_number] => 20020158344
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-31
[patent_title] => 'Configuration with at least two stacked semiconductor chips and method for forming the configuration'
[patent_app_type] => new
[patent_app_number] => 10/132805
[patent_app_country] => US
[patent_app_date] => 2002-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4379
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20020158344.pdf
[firstpage_image] =>[orig_patent_app_number] => 10132805
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/132805 | Configuration with at least two stacked semiconductor chips and method for forming the configuration | Apr 24, 2002 | Abandoned |
Array
(
[id] => 6807291
[patent_doc_number] => 20030197230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-23
[patent_title] => 'High performance CMOS device structure with mid-gap metal gate'
[patent_app_type] => new
[patent_app_number] => 10/127196
[patent_app_country] => US
[patent_app_date] => 2002-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2375
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0197/20030197230.pdf
[firstpage_image] =>[orig_patent_app_number] => 10127196
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/127196 | High performance CMOS device structure with mid-gap metal gate | Apr 18, 2002 | Issued |
Array
(
[id] => 6727729
[patent_doc_number] => 20030183919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-02
[patent_title] => 'INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT AND PACKAGE'
[patent_app_type] => new
[patent_app_number] => 10/114625
[patent_app_country] => US
[patent_app_date] => 2002-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5799
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0183/20030183919.pdf
[firstpage_image] =>[orig_patent_app_number] => 10114625
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/114625 | Integrated circuit package | Apr 1, 2002 | Issued |
Array
(
[id] => 6794707
[patent_doc_number] => 20030173580
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications'
[patent_app_type] => new
[patent_app_number] => 10/063025
[patent_app_country] => US
[patent_app_date] => 2002-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2553
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20030173580.pdf
[firstpage_image] =>[orig_patent_app_number] => 10063025
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/063025 | Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications | Mar 12, 2002 | Issued |
Array
(
[id] => 683023
[patent_doc_number] => 07081661
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-25
[patent_title] => 'High-frequency module and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/098895
[patent_app_country] => US
[patent_app_date] => 2002-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 4234
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/081/07081661.pdf
[firstpage_image] =>[orig_patent_app_number] => 10098895
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/098895 | High-frequency module and method for manufacturing the same | Mar 12, 2002 | Issued |
Array
(
[id] => 6794763
[patent_doc_number] => 20030173636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'Compound semiconductor protection device for low voltage and high speed data lines'
[patent_app_type] => new
[patent_app_number] => 10/096995
[patent_app_country] => US
[patent_app_date] => 2002-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9575
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20030173636.pdf
[firstpage_image] =>[orig_patent_app_number] => 10096995
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/096995 | Compound semiconductor protection device for low voltage and high speed data lines | Mar 11, 2002 | Issued |
Array
(
[id] => 877565
[patent_doc_number] => 07358607
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-15
[patent_title] => 'Substrates and systems to minimize signal path discontinuities'
[patent_app_type] => utility
[patent_app_number] => 10/090735
[patent_app_country] => US
[patent_app_date] => 2002-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4214
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/358/07358607.pdf
[firstpage_image] =>[orig_patent_app_number] => 10090735
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/090735 | Substrates and systems to minimize signal path discontinuities | Mar 5, 2002 | Issued |
| 10/070256 | Semiconductor module | Mar 3, 2002 | Abandoned |
Array
(
[id] => 5901056
[patent_doc_number] => 20020140052
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'High frequency semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/085035
[patent_app_country] => US
[patent_app_date] => 2002-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 1866
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20020140052.pdf
[firstpage_image] =>[orig_patent_app_number] => 10085035
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/085035 | High frequency semiconductor device | Feb 28, 2002 | Abandoned |