Search

Jimmy Nguyen

Examiner (ID: 7143)

Most Active Art Unit
2829
Art Unit(s)
2858, 2829
Total Applications
440
Issued Applications
398
Pending Applications
9
Abandoned Applications
33

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1472104 [patent_doc_number] => 06407562 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Probe tip terminating device providing an easily changeable feed-through termination' [patent_app_type] => B1 [patent_app_number] => 09/354759 [patent_app_country] => US [patent_app_date] => 1999-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 2299 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407562.pdf [firstpage_image] =>[orig_patent_app_number] => 09354759 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/354759
Probe tip terminating device providing an easily changeable feed-through termination Jul 28, 1999 Issued
Array ( [id] => 4389953 [patent_doc_number] => 06278285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Configuration for testing integrated components' [patent_app_type] => 1 [patent_app_number] => 9/356955 [patent_app_country] => US [patent_app_date] => 1999-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1275 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278285.pdf [firstpage_image] =>[orig_patent_app_number] => 356955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/356955
Configuration for testing integrated components Jul 18, 1999 Issued
Array ( [id] => 1419283 [patent_doc_number] => 06529028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Configuration for testing a plurality of memory chips on a wafer' [patent_app_type] => B1 [patent_app_number] => 09/302649 [patent_app_country] => US [patent_app_date] => 1999-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1497 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529028.pdf [firstpage_image] =>[orig_patent_app_number] => 09302649 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/302649
Configuration for testing a plurality of memory chips on a wafer Apr 29, 1999 Issued
Array ( [id] => 4414128 [patent_doc_number] => 06239591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method and apparatus for monitoring SOI hysterises effects' [patent_app_type] => 1 [patent_app_number] => 9/303358 [patent_app_country] => US [patent_app_date] => 1999-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2369 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239591.pdf [firstpage_image] =>[orig_patent_app_number] => 303358 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/303358
Method and apparatus for monitoring SOI hysterises effects Apr 28, 1999 Issued
Array ( [id] => 4279409 [patent_doc_number] => 06246251 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Test process and apparatus for testing singulated semiconductor die' [patent_app_type] => 1 [patent_app_number] => 9/298659 [patent_app_country] => US [patent_app_date] => 1999-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 4844 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246251.pdf [firstpage_image] =>[orig_patent_app_number] => 298659 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/298659
Test process and apparatus for testing singulated semiconductor die Apr 22, 1999 Issued
Array ( [id] => 4414747 [patent_doc_number] => 06300757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Procedure for the calibration of a measuring device' [patent_app_type] => 1 [patent_app_number] => 9/296035 [patent_app_country] => US [patent_app_date] => 1999-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1712 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300757.pdf [firstpage_image] =>[orig_patent_app_number] => 296035 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/296035
Procedure for the calibration of a measuring device Apr 20, 1999 Issued
Array ( [id] => 1497681 [patent_doc_number] => 06404181 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Parts container, method of inspecting parts using same, and apparatus therefor' [patent_app_type] => B1 [patent_app_number] => 09/284643 [patent_app_country] => US [patent_app_date] => 1999-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 40 [patent_no_of_words] => 6782 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404181.pdf [firstpage_image] =>[orig_patent_app_number] => 09284643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/284643
Parts container, method of inspecting parts using same, and apparatus therefor Apr 15, 1999 Issued
Array ( [id] => 4267727 [patent_doc_number] => 06259261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Method and apparatus for electrically testing semiconductor devices fabricated on a wafer' [patent_app_type] => 1 [patent_app_number] => 9/292741 [patent_app_country] => US [patent_app_date] => 1999-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3719 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259261.pdf [firstpage_image] =>[orig_patent_app_number] => 292741 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/292741
Method and apparatus for electrically testing semiconductor devices fabricated on a wafer Apr 15, 1999 Issued
Array ( [id] => 1553666 [patent_doc_number] => 06400166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-04 [patent_title] => 'Micro probe and method of fabricating same' [patent_app_type] => B2 [patent_app_number] => 09/292721 [patent_app_country] => US [patent_app_date] => 1999-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 53 [patent_no_of_words] => 5106 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/400/06400166.pdf [firstpage_image] =>[orig_patent_app_number] => 09292721 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/292721
Micro probe and method of fabricating same Apr 14, 1999 Issued
Array ( [id] => 4425254 [patent_doc_number] => 06225816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Split resistor probe and method' [patent_app_type] => 1 [patent_app_number] => 9/288347 [patent_app_country] => US [patent_app_date] => 1999-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4760 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225816.pdf [firstpage_image] =>[orig_patent_app_number] => 288347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/288347
Split resistor probe and method Apr 7, 1999 Issued
Array ( [id] => 4375391 [patent_doc_number] => 06275055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/286291 [patent_app_country] => US [patent_app_date] => 1999-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5408 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275055.pdf [firstpage_image] =>[orig_patent_app_number] => 286291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286291
Semiconductor integrated circuit Apr 5, 1999 Issued
Array ( [id] => 4267827 [patent_doc_number] => 06259268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Voltage stress testable embedded dual capacitor structure and process for its testing' [patent_app_type] => 1 [patent_app_number] => 9/285374 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4866 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259268.pdf [firstpage_image] =>[orig_patent_app_number] => 285374 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285374
Voltage stress testable embedded dual capacitor structure and process for its testing Apr 1, 1999 Issued
Array ( [id] => 1311658 [patent_doc_number] => 06617863 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Probing device and manufacturing method thereof, as well as testing apparatus and manufacturing method of semiconductor with use thereof' [patent_app_type] => B1 [patent_app_number] => 09/285074 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 49 [patent_no_of_words] => 16398 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617863.pdf [firstpage_image] =>[orig_patent_app_number] => 09285074 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285074
Probing device and manufacturing method thereof, as well as testing apparatus and manufacturing method of semiconductor with use thereof Apr 1, 1999 Issued
Array ( [id] => 1366818 [patent_doc_number] => 06573739 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'IC testing apparatus' [patent_app_type] => B1 [patent_app_number] => 09/283571 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 5462 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573739.pdf [firstpage_image] =>[orig_patent_app_number] => 09283571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283571
IC testing apparatus Mar 31, 1999 Issued
Array ( [id] => 4411966 [patent_doc_number] => 06271673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Probe for measuring signals' [patent_app_type] => 1 [patent_app_number] => 9/277798 [patent_app_country] => US [patent_app_date] => 1999-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3076 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271673.pdf [firstpage_image] =>[orig_patent_app_number] => 277798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/277798
Probe for measuring signals Mar 26, 1999 Issued
Array ( [id] => 1418683 [patent_doc_number] => 06528984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-04 [patent_title] => 'Integrated compliant probe for wafer level test and burn-in' [patent_app_type] => B2 [patent_app_number] => 09/254768 [patent_app_country] => US [patent_app_date] => 1999-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 5532 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528984.pdf [firstpage_image] =>[orig_patent_app_number] => 09254768 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/254768
Integrated compliant probe for wafer level test and burn-in Mar 10, 1999 Issued
Array ( [id] => 1525092 [patent_doc_number] => 06353313 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Remote, wireless electrical signal measurement device' [patent_app_type] => B1 [patent_app_number] => 09/266318 [patent_app_country] => US [patent_app_date] => 1999-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 7369 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353313.pdf [firstpage_image] =>[orig_patent_app_number] => 09266318 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/266318
Remote, wireless electrical signal measurement device Mar 10, 1999 Issued
Array ( [id] => 7063782 [patent_doc_number] => 20010043073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-22 [patent_title] => 'PROBER INTERFACE PLATE' [patent_app_type] => new [patent_app_number] => 09/264748 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1664 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20010043073.pdf [firstpage_image] =>[orig_patent_app_number] => 09264748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264748
PROBER INTERFACE PLATE Mar 8, 1999 Abandoned
Array ( [id] => 4293713 [patent_doc_number] => 06268717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Semiconductor test structure with intentional partial defects and method of use' [patent_app_type] => 1 [patent_app_number] => 9/262239 [patent_app_country] => US [patent_app_date] => 1999-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268717.pdf [firstpage_image] =>[orig_patent_app_number] => 262239 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/262239
Semiconductor test structure with intentional partial defects and method of use Mar 3, 1999 Issued
Array ( [id] => 4413158 [patent_doc_number] => 06172513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Method for analyzing electrical contact between two conductive members of semiconductor device without destruction thereof' [patent_app_type] => 1 [patent_app_number] => 9/260050 [patent_app_country] => US [patent_app_date] => 1999-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 5752 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172513.pdf [firstpage_image] =>[orig_patent_app_number] => 260050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/260050
Method for analyzing electrical contact between two conductive members of semiconductor device without destruction thereof Mar 1, 1999 Issued
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