Search

Jing-yih Shyu

Examiner (ID: 7802, Phone: (571)270-3488 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
628
Issued Applications
545
Pending Applications
0
Abandoned Applications
86

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17031997 [patent_doc_number] => 11093811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Memory card with multiple modes, and host device corresponding to the memory card [patent_app_type] => utility [patent_app_number] => 16/619012 [patent_app_country] => US [patent_app_date] => 2018-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 37 [patent_no_of_words] => 16635 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16619012 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/619012
Memory card with multiple modes, and host device corresponding to the memory card Mar 8, 2018 Issued
Array ( [id] => 14918075 [patent_doc_number] => 10430357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Selectively enable data transfer based on accrued data credits [patent_app_type] => utility [patent_app_number] => 15/899910 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5158 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899910 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/899910
Selectively enable data transfer based on accrued data credits Feb 19, 2018 Issued
Array ( [id] => 12735733 [patent_doc_number] => 20180137078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => SYSTEM FOR COMMUNICATION VIA A PERIPHERAL HUB [patent_app_type] => utility [patent_app_number] => 15/848783 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848783 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848783
System for exchanging information between wireless peripherals and back-end systems via a peripheral hub Dec 19, 2017 Issued
Array ( [id] => 16478314 [patent_doc_number] => 10853262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Memory address translation using stored key entries [patent_app_type] => utility [patent_app_number] => 16/342644 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 35 [patent_no_of_words] => 18653 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16342644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/342644
Memory address translation using stored key entries Nov 28, 2017 Issued
Array ( [id] => 15075347 [patent_doc_number] => 10467164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Input/output port rotation in a storage area network device [patent_app_type] => utility [patent_app_number] => 15/821465 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10341 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15821465 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/821465
Input/output port rotation in a storage area network device Nov 21, 2017 Issued
Array ( [id] => 12869026 [patent_doc_number] => 20180181517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => DISCOVERY MECHANISMS FOR UNIVERSAL SERIAL BUS (USB) PROTOCOL ADAPTATION LAYER [patent_app_type] => utility [patent_app_number] => 15/817788 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817788 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817788
DISCOVERY MECHANISMS FOR UNIVERSAL SERIAL BUS (USB) PROTOCOL ADAPTATION LAYER Nov 19, 2017 Abandoned
Array ( [id] => 15012875 [patent_doc_number] => 10452583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Data transfer device and data transfer method having a shorter time interval between pieces of final transfer data in a frame image [patent_app_type] => utility [patent_app_number] => 15/814879 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 16917 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15814879 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/814879
Data transfer device and data transfer method having a shorter time interval between pieces of final transfer data in a frame image Nov 15, 2017 Issued
Array ( [id] => 12242116 [patent_doc_number] => 20180074979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'DATA TRANSFER DEVICE AND DATA TRANSFER METHOD' [patent_app_type] => utility [patent_app_number] => 15/813853 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12303 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813853 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813853
Data transfer device and data transfer method for smoothing data to a common bus Nov 14, 2017 Issued
Array ( [id] => 14426777 [patent_doc_number] => 10318192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Performing preprocessing operations in anticipation of log file writes [patent_app_type] => utility [patent_app_number] => 15/814121 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7160 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15814121 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/814121
Performing preprocessing operations in anticipation of log file writes Nov 14, 2017 Issued
Array ( [id] => 14427327 [patent_doc_number] => 10318467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Preventing input/output (I/O) traffic overloading of an interconnect channel in a distributed data storage system [patent_app_type] => utility [patent_app_number] => 15/798802 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4700 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15798802 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/798802
Preventing input/output (I/O) traffic overloading of an interconnect channel in a distributed data storage system Oct 30, 2017 Issued
Array ( [id] => 15472395 [patent_doc_number] => 10552071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-04 [patent_title] => Layered data path architecture for data protection and mobility [patent_app_type] => utility [patent_app_number] => 15/798604 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15798604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/798604
Layered data path architecture for data protection and mobility Oct 30, 2017 Issued
Array ( [id] => 15299501 [patent_doc_number] => 20190392886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => APPLYING CHIP SELECT FOR MEMORY DEVICE IDENTIFICATION AND POWER MANAGEMENT CONTROL [patent_app_type] => utility [patent_app_number] => 16/340084 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16340084 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/340084
Applying chip select for memory device identification and power management control Oct 29, 2017 Issued
Array ( [id] => 17209363 [patent_doc_number] => 11169733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Asset processing from persistent memory [patent_app_type] => utility [patent_app_number] => 16/605188 [patent_app_country] => US [patent_app_date] => 2017-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16605188 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/605188
Asset processing from persistent memory Oct 25, 2017 Issued
Array ( [id] => 15248467 [patent_doc_number] => 10509758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-17 [patent_title] => Emulated switch with hot-plugging [patent_app_type] => utility [patent_app_number] => 15/718955 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 19156 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15718955 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/718955
Emulated switch with hot-plugging Sep 27, 2017 Issued
Array ( [id] => 14704591 [patent_doc_number] => 10380043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Memory bus MR register programming process [patent_app_type] => utility [patent_app_number] => 15/718346 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5778 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15718346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/718346
Memory bus MR register programming process Sep 27, 2017 Issued
Array ( [id] => 14427017 [patent_doc_number] => 10318312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Support of Option-ROM in socket-direct network adapters [patent_app_type] => utility [patent_app_number] => 15/717969 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3092 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15717969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/717969
Support of Option-ROM in socket-direct network adapters Sep 27, 2017 Issued
Array ( [id] => 13767575 [patent_doc_number] => 10176131 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-08 [patent_title] => Controlling exclusive access using supplemental transaction identifiers [patent_app_type] => utility [patent_app_number] => 15/717650 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15717650 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/717650
Controlling exclusive access using supplemental transaction identifiers Sep 26, 2017 Issued
Array ( [id] => 12121030 [patent_doc_number] => 20180004615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Front End Traffic Handling In Modular Switched Fabric Based Data Storage Systems' [patent_app_type] => utility [patent_app_number] => 15/708320 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 30042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708320 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708320
Front end traffic handling in modular switched fabric based data storage systems Sep 18, 2017 Issued
Array ( [id] => 15059131 [patent_doc_number] => 10459871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Switching reduction bus using data bit inversion with shield lines [patent_app_type] => utility [patent_app_number] => 15/703736 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 9482 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703736 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/703736
Switching reduction bus using data bit inversion with shield lines Sep 12, 2017 Issued
Array ( [id] => 15198175 [patent_doc_number] => 10496583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Low power multilevel driver for generating wire signals according to summations of a plurality of weighted analog signal components having wire-specific sub-channel weights [patent_app_type] => utility [patent_app_number] => 15/698567 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5699 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15698567 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/698567
Low power multilevel driver for generating wire signals according to summations of a plurality of weighted analog signal components having wire-specific sub-channel weights Sep 6, 2017 Issued
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