Search

John A. Bodnar

Examiner (ID: 16731, Phone: (571)272-4660 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893
Total Applications
735
Issued Applications
584
Pending Applications
85
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19169899 [patent_doc_number] => 11985824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Three-dimensional memory devices having dummy channel structures and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/084315 [patent_app_country] => US [patent_app_date] => 2020-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7226 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/084315
Three-dimensional memory devices having dummy channel structures and methods for forming the same Oct 28, 2020 Issued
Array ( [id] => 17486089 [patent_doc_number] => 20220093593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/083342 [patent_app_country] => US [patent_app_date] => 2020-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17083342 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/083342
Semiconductor device and manufacturing method thereof Oct 28, 2020 Issued
Array ( [id] => 19296147 [patent_doc_number] => 12035524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Channel structures having protruding portions in three-dimensional memory device and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/084423 [patent_app_country] => US [patent_app_date] => 2020-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9051 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084423 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/084423
Channel structures having protruding portions in three-dimensional memory device and method for forming the same Oct 28, 2020 Issued
Array ( [id] => 17463860 [patent_doc_number] => 20220077166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/073443 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17073443 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/073443
Semiconductor structure and manufacturing method thereof Oct 18, 2020 Issued
Array ( [id] => 17978782 [patent_doc_number] => 11495657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Thin film resistor (TFR) formed in an integrated circuit device using an oxide cap layer as a TFR etch hardmask [patent_app_type] => utility [patent_app_number] => 17/071584 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 43 [patent_no_of_words] => 9592 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071584 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/071584
Thin film resistor (TFR) formed in an integrated circuit device using an oxide cap layer as a TFR etch hardmask Oct 14, 2020 Issued
Array ( [id] => 18105588 [patent_doc_number] => 11545486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Integrated thin film resistor and metal-insulator-metal capacitor [patent_app_type] => utility [patent_app_number] => 17/062292 [patent_app_country] => US [patent_app_date] => 2020-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3664 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17062292 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/062292
Integrated thin film resistor and metal-insulator-metal capacitor Oct 1, 2020 Issued
Array ( [id] => 17509240 [patent_doc_number] => 20220102343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => MULTI-LAYER ETCH STOP LAYERS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 17/033440 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033440 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/033440
Multi-layer etch stop layers for advanced integrated circuit structure fabrication Sep 24, 2020 Issued
Array ( [id] => 17825855 [patent_doc_number] => 11430810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Semiconductor device and manufacturing method of semiconductor device [patent_app_type] => utility [patent_app_number] => 16/992960 [patent_app_country] => US [patent_app_date] => 2020-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 54 [patent_no_of_words] => 18625 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16992960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/992960
Semiconductor device and manufacturing method of semiconductor device Aug 12, 2020 Issued
Array ( [id] => 18040344 [patent_doc_number] => 20220384561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => RESISTANCE ELEMENT AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/770363 [patent_app_country] => US [patent_app_date] => 2020-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17770363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/770363
RESISTANCE ELEMENT AND ELECTRONIC DEVICE Aug 6, 2020 Pending
Array ( [id] => 18277168 [patent_doc_number] => 11616118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Integrated circuit semiconductor device [patent_app_type] => utility [patent_app_number] => 16/938286 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 11667 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/938286
Integrated circuit semiconductor device Jul 23, 2020 Issued
Array ( [id] => 20260551 [patent_doc_number] => 12432922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices [patent_app_type] => utility [patent_app_number] => 18/002513 [patent_app_country] => US [patent_app_date] => 2020-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12283 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18002513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/002513
Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices Jul 22, 2020 Issued
Array ( [id] => 16421721 [patent_doc_number] => 20200346919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => MEMS APPARATUS WITH ANTI-STICTION LAYER [patent_app_type] => utility [patent_app_number] => 16/934236 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934236 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934236
MEMS apparatus with anti-stiction layer Jul 20, 2020 Issued
Array ( [id] => 16425013 [patent_doc_number] => 20200350211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => STACKED TRANSISTORS WITH DIFFERENT CHANNEL WIDTHS [patent_app_type] => utility [patent_app_number] => 16/932362 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/932362
Stacked transistors with different channel widths Jul 16, 2020 Issued
Array ( [id] => 18263110 [patent_doc_number] => 11610819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Structures and methods of fabricating electronic devices using separation and charge depletion techniques [patent_app_type] => utility [patent_app_number] => 16/931051 [patent_app_country] => US [patent_app_date] => 2020-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 5758 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16931051 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/931051
Structures and methods of fabricating electronic devices using separation and charge depletion techniques Jul 15, 2020 Issued
Array ( [id] => 17347204 [patent_doc_number] => 20220013535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => THREE-DIMENSIONAL FLASH MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/924001 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924001
Three-dimensional flash memory device Jul 7, 2020 Issued
Array ( [id] => 16394520 [patent_doc_number] => 20200335461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => SEMICONDUCTOR DEVICE WITH REDISTRIBUTION LAYERS FORMED UTILIZING DUMMY SUBSTRATES [patent_app_type] => utility [patent_app_number] => 16/921522 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921522 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921522
Semiconductor device with redistribution layers formed utilizing dummy substrates Jul 5, 2020 Issued
Array ( [id] => 18281978 [patent_doc_number] => 20230097450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SOI ACTIVE TRANSFER BOARD FOR THREE-DIMENSIONAL PACKAGING AND PREPARATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/052857 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2928 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17052857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/052857
SOI active transfer board for three-dimensional packaging and preparation method thereof Jul 1, 2020 Issued
Array ( [id] => 18016269 [patent_doc_number] => 11508575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Low warp fan-out processing method and production of substrates therefor [patent_app_type] => utility [patent_app_number] => 16/916385 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5184 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916385
Low warp fan-out processing method and production of substrates therefor Jun 29, 2020 Issued
Array ( [id] => 18105646 [patent_doc_number] => 11545546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 16/917473 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 47 [patent_no_of_words] => 16760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16917473 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/917473
Semiconductor device and method Jun 29, 2020 Issued
Array ( [id] => 17971324 [patent_doc_number] => 11488872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Method for forming semiconductor device structure with isolation feature [patent_app_type] => utility [patent_app_number] => 16/914655 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914655
Method for forming semiconductor device structure with isolation feature Jun 28, 2020 Issued
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