Search

John A. Bodnar

Examiner (ID: 584, Phone: (571)272-4660 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893
Total Applications
740
Issued Applications
594
Pending Applications
69
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11753452 [patent_doc_number] => 09711470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Package on package structure and method for forming the same' [patent_app_type] => utility [patent_app_number] => 14/975911 [patent_app_country] => US [patent_app_date] => 2015-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14975911 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/975911
Package on package structure and method for forming the same Dec 20, 2015 Issued
Array ( [id] => 11315518 [patent_doc_number] => 20160351628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/970082 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9085 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970082 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/970082
Semiconductor memory device Dec 14, 2015 Issued
Array ( [id] => 11578747 [patent_doc_number] => 09634017 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-25 [patent_title] => 'Semiconductor structure including a nonvolatile memory cell and method for the formation thereof' [patent_app_type] => utility [patent_app_number] => 14/959382 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11366 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959382 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959382
Semiconductor structure including a nonvolatile memory cell and method for the formation thereof Dec 3, 2015 Issued
Array ( [id] => 10696942 [patent_doc_number] => 20160043089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'MEMORY CELL SUPPORT LATTICE' [patent_app_type] => utility [patent_app_number] => 14/877212 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4120 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14877212 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/877212
MEMORY CELL SUPPORT LATTICE Oct 6, 2015 Abandoned
Array ( [id] => 14177769 [patent_doc_number] => 10262905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs [patent_app_type] => utility [patent_app_number] => 14/867797 [patent_app_country] => US [patent_app_date] => 2015-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5691 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14867797 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/867797
Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs Sep 27, 2015 Issued
Array ( [id] => 13306837 [patent_doc_number] => 20180204955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => SEMICONDUCTOR NANOWIRE DEVICE HAVING CAVITY SPACER AND METHOD OF FABRICATING CAVITY SPACER FOR SEMICONDUCTOR NANOWIRE DEVICE [patent_app_type] => utility [patent_app_number] => 15/743575 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7431 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15743575 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/743575
Semiconductor nanowire device having cavity spacer and method of fabricating cavity spacer for semiconductor nanowire device Sep 9, 2015 Issued
Array ( [id] => 13950743 [patent_doc_number] => 10211150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Memory structure [patent_app_type] => utility [patent_app_number] => 14/845304 [patent_app_country] => US [patent_app_date] => 2015-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2285 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14845304 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/845304
Memory structure Sep 3, 2015 Issued
Array ( [id] => 10725729 [patent_doc_number] => 20160071877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING CELL ON PERIPHERAL EPI-SUBSTRATE AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/845307 [patent_app_country] => US [patent_app_date] => 2015-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 14509 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14845307 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/845307
SEMICONDUCTOR DEVICES INCLUDING CELL ON PERIPHERAL EPI-SUBSTRATE AND METHODS OF MANUFACTURING THE SAME Sep 3, 2015 Abandoned
Array ( [id] => 11495569 [patent_doc_number] => 20170069753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'INTEGRATED CIRCUITS HAVING TUNNEL TRANSISTORS AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/844522 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6274 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844522 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844522
Integrated circuits having tunnel transistors and methods for fabricating the same Sep 2, 2015 Issued
Array ( [id] => 11495570 [patent_doc_number] => 20170069755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'EMBEDDED SIGE PROCESS FOR MULTI-THRESHOLD PMOS TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 14/845112 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2500 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14845112 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/845112
Embedded SiGe process for multi-threshold PMOS transistors Sep 2, 2015 Issued
Array ( [id] => 10817497 [patent_doc_number] => 20160163659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'RADIO FREQUENCY DEVICE PROTECTED AGAINST OVERVOLTAGES' [patent_app_type] => utility [patent_app_number] => 14/844626 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844626 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844626
RADIO FREQUENCY DEVICE PROTECTED AGAINST OVERVOLTAGES Sep 2, 2015 Abandoned
Array ( [id] => 11043713 [patent_doc_number] => 20160240669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'SYSTEM AND METHOD FOR FABRICATING HIGH VOLTAGE POWER MOSFET' [patent_app_type] => utility [patent_app_number] => 14/844669 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6048 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844669 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844669
System and method for fabricating high voltage power MOSFET Sep 2, 2015 Issued
Array ( [id] => 11071359 [patent_doc_number] => 20160268323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/845193 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14845193 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/845193
SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME Sep 2, 2015 Abandoned
Array ( [id] => 11060598 [patent_doc_number] => 20160257560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'MEMS DEVICE' [patent_app_type] => utility [patent_app_number] => 14/845025 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4724 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14845025 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/845025
MEMS DEVICE Sep 2, 2015 Abandoned
Array ( [id] => 10725834 [patent_doc_number] => 20160071982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'SEMICONDUCTOR DEVICE WITH GRAPHENE LAYER AS CHANNEL' [patent_app_type] => utility [patent_app_number] => 14/844996 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3447 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844996 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844996
Semiconductor device with graphene layer as channel Sep 2, 2015 Issued
Array ( [id] => 17002740 [patent_doc_number] => 11081563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Formation of silicide contacts in semiconductor devices [patent_app_type] => utility [patent_app_number] => 14/839597 [patent_app_country] => US [patent_app_date] => 2015-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14839597 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/839597
Formation of silicide contacts in semiconductor devices Aug 27, 2015 Issued
Array ( [id] => 11439329 [patent_doc_number] => 20170040351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/913322 [patent_app_country] => US [patent_app_date] => 2015-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6880 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14913322 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/913322
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE Aug 12, 2015 Abandoned
Array ( [id] => 10667231 [patent_doc_number] => 20160013377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'LIGHT EMITTING DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/794476 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794476 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794476
Light emitting device package Jul 7, 2015 Issued
Array ( [id] => 10667237 [patent_doc_number] => 20160013382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'LIGHT EMITTING DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/794475 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794475 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794475
Light emitting device package Jul 7, 2015 Issued
Array ( [id] => 11386106 [patent_doc_number] => 20170012162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'DUAL MODE III-V SUPERLATTICE AVALANCHE PHOTODIODE' [patent_app_type] => utility [patent_app_number] => 14/792962 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2511 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792962 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792962
Dual mode III-V superlattice avalanche photodiode Jul 6, 2015 Issued
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