Search

John A. Bodnar

Examiner (ID: 584, Phone: (571)272-4660 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893
Total Applications
740
Issued Applications
594
Pending Applications
69
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18906242 [patent_doc_number] => 20240021727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => Gate Structure and Method with Enhanced Gate Contact and Threshold Voltage [patent_app_type] => utility [patent_app_number] => 18/355997 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/355997
Gate structure and method with enhanced gate contact and threshold voltage Jul 19, 2023 Issued
Array ( [id] => 18943694 [patent_doc_number] => 20240038833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => CARBON MOLD FOR DRAM CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/222086 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18222086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/222086
CARBON MOLD FOR DRAM CAPACITOR Jul 13, 2023 Pending
Array ( [id] => 19688297 [patent_doc_number] => 20250006842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => OPENING IN STRESS-INDUCING LINER(S) BETWEEN TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/345001 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345001 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/345001
OPENING IN STRESS-INDUCING LINER(S) BETWEEN TRANSISTORS Jun 29, 2023 Pending
Array ( [id] => 18743491 [patent_doc_number] => 20230352479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/344580 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344580 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/344580
Semiconductor devices and methods of manufacturing thereof Jun 28, 2023 Issued
Array ( [id] => 19634745 [patent_doc_number] => 20240413194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => THREE-DIMENSIONAL METAL-INSULATOR-METAL CAPACITORS [patent_app_type] => utility [patent_app_number] => 18/333470 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333470 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333470
THREE-DIMENSIONAL METAL-INSULATOR-METAL CAPACITORS Jun 11, 2023 Issued
Array ( [id] => 19376831 [patent_doc_number] => 12068413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Semiconductor device and manufacturing method thereof and electronic apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/315836 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 53 [patent_no_of_words] => 10591 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315836 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/315836
Semiconductor device and manufacturing method thereof and electronic apparatus including the same May 10, 2023 Issued
Array ( [id] => 19101180 [patent_doc_number] => 20240120408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => FORMING NANOSHEET TRANSISTOR USING SACRIFICIAL SPACER AND INNER SPACERS [patent_app_type] => utility [patent_app_number] => 18/195269 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195269 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195269
Forming nanosheet transistor using sacrificial spacer and inner spacers May 8, 2023 Issued
Array ( [id] => 18631884 [patent_doc_number] => 20230290789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/133086 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133086
DISPLAY DEVICE Apr 10, 2023 Abandoned
Array ( [id] => 18866059 [patent_doc_number] => 20230420496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => Digital Isolator Structure and Method for Forming the Same [patent_app_type] => utility [patent_app_number] => 18/130573 [patent_app_country] => US [patent_app_date] => 2023-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18130573 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/130573
Digital Isolator Structure and Method for Forming the Same Apr 3, 2023 Pending
Array ( [id] => 18943690 [patent_doc_number] => 20240038829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => METHOD OF FABRICATING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/295433 [patent_app_country] => US [patent_app_date] => 2023-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295433 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295433
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE Apr 3, 2023 Issued
Array ( [id] => 20484038 [patent_doc_number] => 12532517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Fill fins for semiconductor devices [patent_app_type] => utility [patent_app_number] => 18/295010 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 4461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295010
Fill fins for semiconductor devices Apr 2, 2023 Issued
Array ( [id] => 19237388 [patent_doc_number] => 20240194583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => MIM FLUX CAPACITOR WITH THIN AND THICK METAL LEVELS [patent_app_type] => utility [patent_app_number] => 18/128490 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128490 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/128490
MIM FLUX CAPACITOR WITH THIN AND THICK METAL LEVELS Mar 29, 2023 Pending
Array ( [id] => 18696307 [patent_doc_number] => 20230326743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => METHOD AND SYSTEM FOR MIXED GROUP V PRECURSOR PROCESS [patent_app_type] => utility [patent_app_number] => 18/128433 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128433 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/128433
Method and system for mixed group V precursor process Mar 29, 2023 Issued
Array ( [id] => 19468274 [patent_doc_number] => 20240321944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STRUCTURE AND METHOD FOR DEEP TRENCH CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/188082 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188082 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188082
STRUCTURE AND METHOD FOR DEEP TRENCH CAPACITOR Mar 21, 2023 Pending
Array ( [id] => 19294673 [patent_doc_number] => 12034038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Method for manufacturing capacitor structure [patent_app_type] => utility [patent_app_number] => 18/119043 [patent_app_country] => US [patent_app_date] => 2023-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5753 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119043 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/119043
Method for manufacturing capacitor structure Mar 7, 2023 Issued
Array ( [id] => 18533349 [patent_doc_number] => 20230238425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => CAPACITOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/119009 [patent_app_country] => US [patent_app_date] => 2023-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119009 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/119009
Capacitor structure and method for manufacturing the same Mar 7, 2023 Issued
Array ( [id] => 18473214 [patent_doc_number] => 20230207502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => SEMICONDUCTOR DEVICE WITH REDISTRIBUTION LAYERS FORMED UTILIZING DUMMY SUBSTRATES [patent_app_type] => utility [patent_app_number] => 18/117539 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117539 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/117539
Semiconductor device with redistribution layers formed utilizing dummy substrates Mar 5, 2023 Issued
Array ( [id] => 18743531 [patent_doc_number] => 20230352519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS OF SEMICONDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/117911 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/117911
SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS OF SEMICONDUCTOR STRUCTURES Mar 5, 2023 Pending
Array ( [id] => 19421046 [patent_doc_number] => 20240297170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/178406 [patent_app_country] => US [patent_app_date] => 2023-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178406 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/178406
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Mar 2, 2023 Pending
Array ( [id] => 18631908 [patent_doc_number] => 20230290813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => CAPACITOR INCLUDING LATERAL PLATES AND METHOD FOR FORMING A CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/178333 [patent_app_country] => US [patent_app_date] => 2023-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178333 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/178333
CAPACITOR INCLUDING LATERAL PLATES AND METHOD FOR FORMING A CAPACITOR Mar 2, 2023 Pending
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