John A. Bodnar

Array ( [id] => 9958503 [patent_doc_number] => 09006712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Organic memory element' [patent_app_type] => utility [patent_app_number] => 13/275963 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 3200 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275963 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9692552 [patent_doc_number] => 08823155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/275430 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 10645 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10893335 [patent_doc_number] => 08916950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Shallow trench isolation structure having a nitride plug' [patent_app_type] => utility [patent_app_number] => 13/275729 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4668 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8765012 [patent_doc_number] => 20130093049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'High Productivity Combinatorial Dual Shadow Mask Design' [patent_app_type] => utility [patent_app_number] => 13/275822 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11826 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9649317 [patent_doc_number] => 08803339 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-12 [patent_title] => 'Bump out for differential signals' [patent_app_type] => utility [patent_app_number] => 13/275781 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6861 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8166402 [patent_doc_number] => 20120104571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/275960 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6123 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20120104571.pdf [firstpage_image] =>[orig_patent_app_number] => 13275960 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9441473 [patent_doc_number] => 08710587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Lateral double diffused metal oxide semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/275603 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3624 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8154614 [patent_doc_number] => 20120097982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'Lighting Device' [patent_app_type] => utility [patent_app_number] => 13/275522 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14922 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20120097982.pdf [firstpage_image] =>[orig_patent_app_number] => 13275522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8765052 [patent_doc_number] => 20130093089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'Interconnect Structure With An Electromigration and Stress Migration Enhancement Liner' [patent_app_type] => utility [patent_app_number] => 13/275352 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9245194 [patent_doc_number] => 08609474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/274367 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4529 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13274367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8764940 [patent_doc_number] => 20130092977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'POWER SEMICONDUCTOR DIODE, IGBT, AND METHOD FOR MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 13/274411 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7636 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13274411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8765002 [patent_doc_number] => 20130093039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'HIGH-K DIELECTRIC AND SILICON NITRIDE BOX REGION' [patent_app_type] => utility [patent_app_number] => 13/274381 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13274381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8764955 [patent_doc_number] => 20130092992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'REPLACEMENT GATE MULTIGATE TRANSISTOR FOR EMBEDDED DRAM' [patent_app_type] => utility [patent_app_number] => 13/274758 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13274758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8261806 [patent_doc_number] => 20120161235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'Electrostatic discharge protection device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/317323 [patent_app_country] => US [patent_app_date] => 2011-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1962 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13317323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8123033 [patent_doc_number] => 20120086060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/253390 [patent_app_country] => US [patent_app_date] => 2011-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12966 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20120086060.pdf [firstpage_image] =>[orig_patent_app_number] => 13253390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8133975 [patent_doc_number] => 20120091532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'Semiconductor Devices Including Buried-Channel-Arrray Transistors' [patent_app_type] => utility [patent_app_number] => 13/239461 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 9858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091532.pdf [firstpage_image] =>[orig_patent_app_number] => 13239461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8717943 [patent_doc_number] => 20130069160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'TRENCH ISOLATION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/233058 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8717945 [patent_doc_number] => 20130069161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'INTEGRATED CIRCUIT STRUCTURE HAVING SELECTIVELY FORMED METAL CAP' [patent_app_type] => utility [patent_app_number] => 13/233064 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9020298 [patent_doc_number] => 08530283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Process for forming an electronic device including a nonvolatile memory structure having an antifuse component' [patent_app_type] => utility [patent_app_number] => 13/232568 [patent_app_country] => US [patent_app_date] => 2011-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 7205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13232568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10876854 [patent_doc_number] => 08901644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Field effect transistor with a vertical channel and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 13/821944 [patent_app_country] => US [patent_app_date] => 2011-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2980 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13821944 [rel_patent_id] =>[rel_patent_doc_number] =>)