Search

John A. Bodnar

Examiner (ID: 584, Phone: (571)272-4660 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893
Total Applications
740
Issued Applications
594
Pending Applications
69
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18473376 [patent_doc_number] => 20230207664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => TRENCH ISOLATION FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 18/116721 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 73488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18116721 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/116721
TRENCH ISOLATION FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION Mar 1, 2023 Pending
Array ( [id] => 19054958 [patent_doc_number] => 20240096927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SILICON CAPACITOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/116318 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18116318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/116318
SILICON CAPACITOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME Mar 1, 2023 Pending
Array ( [id] => 19421087 [patent_doc_number] => 20240297211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => CAPACITOR STRUCTURES OF SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/177087 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177087
CAPACITOR STRUCTURES OF SEMICONDUCTOR DEVICES Feb 28, 2023 Pending
Array ( [id] => 19131002 [patent_doc_number] => 20240136355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/115165 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115165
Power semiconductor device Feb 27, 2023 Issued
Array ( [id] => 19131002 [patent_doc_number] => 20240136355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/115165 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115165
Power semiconductor device Feb 27, 2023 Issued
Array ( [id] => 20119656 [patent_doc_number] => 12369395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Method for growing multiple layers of source drain epitaxial silicon in FDSOI process [patent_app_type] => utility [patent_app_number] => 18/173934 [patent_app_country] => US [patent_app_date] => 2023-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173934 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/173934
Method for growing multiple layers of source drain epitaxial silicon in FDSOI process Feb 23, 2023 Issued
Array ( [id] => 18456445 [patent_doc_number] => 20230197727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/170522 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/170522
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE Feb 15, 2023 Pending
Array ( [id] => 18456486 [patent_doc_number] => 20230197768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => METHOD FOR PREPARING SEMICONDUCTOR DEVICE STRUCTURE WITH BOTTOM CAPACITOR ELECTRODE HAVING CROWN-SHAPED STRUCTURE AND INTERCONNECT PORTION [patent_app_type] => utility [patent_app_number] => 18/108755 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18108755 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/108755
Method for preparing semiconductor device structure with bottom capacitor electrode having crown-shaped structure and interconnect portion Feb 12, 2023 Issued
Array ( [id] => 19040403 [patent_doc_number] => 20240090218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/104711 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104711 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/104711
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Jan 31, 2023 Pending
Array ( [id] => 19191616 [patent_doc_number] => 20240170529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => METAL-INSULATOR-METAL (MIM) CAPACITORS WITH CURVED ELECTRODE [patent_app_type] => utility [patent_app_number] => 18/162775 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162775 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162775
METAL-INSULATOR-METAL (MIM) CAPACITORS WITH CURVED ELECTRODE Jan 31, 2023 Pending
Array ( [id] => 18661428 [patent_doc_number] => 20230307442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => INTEGRATED CIRCUIT CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/072702 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18072702 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/072702
INTEGRATED CIRCUIT CAPACITOR Jan 30, 2023 Pending
Array ( [id] => 19221663 [patent_doc_number] => 20240186367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => INTEGRATION SCHEME FOR FABRICATING HIGH PRECISION, LOW CAPACITOR WITH UNLANDED VIA [patent_app_type] => utility [patent_app_number] => 18/103201 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/103201
INTEGRATION SCHEME FOR FABRICATING HIGH PRECISION, LOW CAPACITOR WITH UNLANDED VIA Jan 29, 2023 Pending
Array ( [id] => 18999127 [patent_doc_number] => 11915983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Structures and methods of fabricating electronic devices using separation and charge depletion techniques [patent_app_type] => utility [patent_app_number] => 18/101134 [patent_app_country] => US [patent_app_date] => 2023-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 5633 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18101134 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/101134
Structures and methods of fabricating electronic devices using separation and charge depletion techniques Jan 24, 2023 Issued
Array ( [id] => 19321581 [patent_doc_number] => 20240243128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => FORMING WRAP AROUND CONTACT WITH SELF-ALIGNED BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 18/156024 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18156024 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/156024
FORMING WRAP AROUND CONTACT WITH SELF-ALIGNED BACKSIDE CONTACT Jan 17, 2023 Pending
Array ( [id] => 20276486 [patent_doc_number] => 12446275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/153652 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153652 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153652
Semiconductor device and manufacturing method thereof Jan 11, 2023 Issued
Array ( [id] => 19321618 [patent_doc_number] => 20240243165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => CAPACITOR AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/153831 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153831 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153831
CAPACITOR AND METHOD FOR FORMING THE SAME Jan 11, 2023 Pending
Array ( [id] => 20484046 [patent_doc_number] => 12532525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Method for manufacturing gate of NAND flash [patent_app_type] => utility [patent_app_number] => 18/152870 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 31 [patent_no_of_words] => 4360 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 540 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152870 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152870
Method for manufacturing gate of NAND flash Jan 10, 2023 Issued
Array ( [id] => 19569446 [patent_doc_number] => 12144237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Mask assembly and apparatus and method of manufacturing display apparatus [patent_app_type] => utility [patent_app_number] => 18/151940 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8535 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151940 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151940
Mask assembly and apparatus and method of manufacturing display apparatus Jan 8, 2023 Issued
Array ( [id] => 18360161 [patent_doc_number] => 20230141752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => HIGH RESISTANCE POLY RESISTOR [patent_app_type] => utility [patent_app_number] => 18/094088 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094088
High resistance poly resistor Jan 5, 2023 Issued
Array ( [id] => 18514742 [patent_doc_number] => 20230231005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/149197 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149197 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149197
METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE Jan 2, 2023 Issued
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