| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3825361
[patent_doc_number] => 05710933
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-20
[patent_title] => 'System resource enable apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/414856
[patent_app_country] => US
[patent_app_date] => 1995-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3075
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/710/05710933.pdf
[firstpage_image] =>[orig_patent_app_number] => 414856
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/414856 | System resource enable apparatus | Mar 30, 1995 | Issued |
| 08/415532 | CONTAINER INDEPENDENT CONTROL ARCHITECTURE | Mar 29, 1995 | Abandoned |
Array
(
[id] => 3803418
[patent_doc_number] => 05822605
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Parallel processor system with a broadcast message serializing circuit provided within a network'
[patent_app_type] => 1
[patent_app_number] => 8/408561
[patent_app_country] => US
[patent_app_date] => 1995-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 27318
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822605.pdf
[firstpage_image] =>[orig_patent_app_number] => 408561
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/408561 | Parallel processor system with a broadcast message serializing circuit provided within a network | Mar 21, 1995 | Issued |
Array
(
[id] => 4198504
[patent_doc_number] => 06038607
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Method and apparatus in a computer system having plural computers which cause the initiation of functions in each other using information contained in packets transferred between the computers'
[patent_app_type] => 1
[patent_app_number] => 8/407841
[patent_app_country] => US
[patent_app_date] => 1995-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 7363
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/038/06038607.pdf
[firstpage_image] =>[orig_patent_app_number] => 407841
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/407841 | Method and apparatus in a computer system having plural computers which cause the initiation of functions in each other using information contained in packets transferred between the computers | Mar 20, 1995 | Issued |
| 08/409485 | BUS INTERFACE SLICING MECHANISM ALLOWING FOR A CONTROL/DATA-PATH SLICE | Mar 19, 1995 | Abandoned |
Array
(
[id] => 3803835
[patent_doc_number] => 05737613
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'Method of operating microcomputer to minimize power dissipation while accessing slow memory'
[patent_app_type] => 1
[patent_app_number] => 8/401885
[patent_app_country] => US
[patent_app_date] => 1995-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 28
[patent_no_of_words] => 11749
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/737/05737613.pdf
[firstpage_image] =>[orig_patent_app_number] => 401885
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/401885 | Method of operating microcomputer to minimize power dissipation while accessing slow memory | Mar 9, 1995 | Issued |
Array
(
[id] => 4257062
[patent_doc_number] => 06081880
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Processor having a scalable, uni/multi-dimensional, and virtually/physically addressed operand register file'
[patent_app_type] => 1
[patent_app_number] => 8/401411
[patent_app_country] => US
[patent_app_date] => 1995-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 22
[patent_no_of_words] => 9307
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/081/06081880.pdf
[firstpage_image] =>[orig_patent_app_number] => 401411
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/401411 | Processor having a scalable, uni/multi-dimensional, and virtually/physically addressed operand register file | Mar 8, 1995 | Issued |
Array
(
[id] => 3709475
[patent_doc_number] => 05678056
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Method and apparatus for control of serial communication by changing address conditions during and after communication start up'
[patent_app_type] => 1
[patent_app_number] => 8/395091
[patent_app_country] => US
[patent_app_date] => 1995-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2902
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/678/05678056.pdf
[firstpage_image] =>[orig_patent_app_number] => 395091
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/395091 | Method and apparatus for control of serial communication by changing address conditions during and after communication start up | Feb 26, 1995 | Issued |
| 08/389481 | PARALLEL PROCESSOR SYSTEM FOR TRANSMITTING DATA IN SMALL BUFFERS | Feb 15, 1995 | Abandoned |
Array
(
[id] => 3739247
[patent_doc_number] => 05652911
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-29
[patent_title] => 'Multinode distributed data processing system for use in a surface vehicle'
[patent_app_type] => 1
[patent_app_number] => 8/386605
[patent_app_country] => US
[patent_app_date] => 1995-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 7726
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/652/05652911.pdf
[firstpage_image] =>[orig_patent_app_number] => 386605
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/386605 | Multinode distributed data processing system for use in a surface vehicle | Feb 9, 1995 | Issued |
Array
(
[id] => 3970682
[patent_doc_number] => 05999987
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-07
[patent_title] => 'Concurrent processing in object oriented parallel and near parallel'
[patent_app_type] => 1
[patent_app_number] => 8/385628
[patent_app_country] => US
[patent_app_date] => 1995-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5345
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/999/05999987.pdf
[firstpage_image] =>[orig_patent_app_number] => 385628
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/385628 | Concurrent processing in object oriented parallel and near parallel | Feb 8, 1995 | Issued |
Array
(
[id] => 3837253
[patent_doc_number] => 05790881
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Computer system including coprocessor devices simulating memory interfaces'
[patent_app_type] => 1
[patent_app_number] => 8/385249
[patent_app_country] => US
[patent_app_date] => 1995-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3597
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/790/05790881.pdf
[firstpage_image] =>[orig_patent_app_number] => 385249
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/385249 | Computer system including coprocessor devices simulating memory interfaces | Feb 6, 1995 | Issued |
Array
(
[id] => 3970800
[patent_doc_number] => 05999994
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-07
[patent_title] => 'Dual path computer control system'
[patent_app_type] => 1
[patent_app_number] => 8/378066
[patent_app_country] => US
[patent_app_date] => 1995-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8683
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/999/05999994.pdf
[firstpage_image] =>[orig_patent_app_number] => 378066
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/378066 | Dual path computer control system | Jan 24, 1995 | Issued |
Array
(
[id] => 3893746
[patent_doc_number] => 05764918
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Communications node for transmitting data files over telephone networks'
[patent_app_type] => 1
[patent_app_number] => 8/376747
[patent_app_country] => US
[patent_app_date] => 1995-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 13935
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/764/05764918.pdf
[firstpage_image] =>[orig_patent_app_number] => 376747
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376747 | Communications node for transmitting data files over telephone networks | Jan 22, 1995 | Issued |
Array
(
[id] => 3818460
[patent_doc_number] => 05854926
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-29
[patent_title] => 'Method and apparatus for identifying flip-flops in HDL descriptions of circuits without specific templates'
[patent_app_type] => 1
[patent_app_number] => 8/376491
[patent_app_country] => US
[patent_app_date] => 1995-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 46
[patent_no_of_words] => 10182
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/854/05854926.pdf
[firstpage_image] =>[orig_patent_app_number] => 376491
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376491 | Method and apparatus for identifying flip-flops in HDL descriptions of circuits without specific templates | Jan 22, 1995 | Issued |
Array
(
[id] => 4373227
[patent_doc_number] => 06202097
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Methods for performing diagnostic functions in a multiprocessor data processing system having a serial diagnostic bus'
[patent_app_type] => 1
[patent_app_number] => 8/373052
[patent_app_country] => US
[patent_app_date] => 1995-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 7804
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/202/06202097.pdf
[firstpage_image] =>[orig_patent_app_number] => 373052
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/373052 | Methods for performing diagnostic functions in a multiprocessor data processing system having a serial diagnostic bus | Jan 16, 1995 | Issued |
Array
(
[id] => 3432213
[patent_doc_number] => 05479618
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-26
[patent_title] => 'I/O module with reduced isolation circuitry'
[patent_app_type] => 1
[patent_app_number] => 8/370343
[patent_app_country] => US
[patent_app_date] => 1995-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5978
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 357
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/479/05479618.pdf
[firstpage_image] =>[orig_patent_app_number] => 370343
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/370343 | I/O module with reduced isolation circuitry | Jan 8, 1995 | Issued |
Array
(
[id] => 3919188
[patent_doc_number] => 05898883
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Memory access mechanism for a parallel processing computer system with distributed shared memory'
[patent_app_type] => 1
[patent_app_number] => 8/368618
[patent_app_country] => US
[patent_app_date] => 1995-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 6584
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/898/05898883.pdf
[firstpage_image] =>[orig_patent_app_number] => 368618
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/368618 | Memory access mechanism for a parallel processing computer system with distributed shared memory | Jan 3, 1995 | Issued |
Array
(
[id] => 4099014
[patent_doc_number] => 06055545
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-25
[patent_title] => 'Updating and reference management system and reference timing control system of shared memory'
[patent_app_type] => 1
[patent_app_number] => 8/366695
[patent_app_country] => US
[patent_app_date] => 1994-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 6838
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/055/06055545.pdf
[firstpage_image] =>[orig_patent_app_number] => 366695
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/366695 | Updating and reference management system and reference timing control system of shared memory | Dec 29, 1994 | Issued |
Array
(
[id] => 3737029
[patent_doc_number] => 05701504
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Apparatus and method for addition based on Kogge-Stone parallel algorithm'
[patent_app_type] => 1
[patent_app_number] => 8/365204
[patent_app_country] => US
[patent_app_date] => 1994-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 5402
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/701/05701504.pdf
[firstpage_image] =>[orig_patent_app_number] => 365204
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/365204 | Apparatus and method for addition based on Kogge-Stone parallel algorithm | Dec 27, 1994 | Issued |