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John A. Follansbee

Supervisory Patent Examiner (ID: 7567, Phone: (571)272-3964 , Office: P/2400 )

Most Active Art Unit
2783
Art Unit(s)
2712, 2302, 2126, 2783, 2154, 2444, 2451, 2156, 2127, 2100
Total Applications
602
Issued Applications
382
Pending Applications
87
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4223217 [patent_doc_number] => 06078949 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Scheme for interlocking and transferring information between devices in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/294765 [patent_app_country] => US [patent_app_date] => 1994-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4512 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078949.pdf [firstpage_image] =>[orig_patent_app_number] => 294765 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/294765
Scheme for interlocking and transferring information between devices in a computer system Aug 22, 1994 Issued
Array ( [id] => 3661843 [patent_doc_number] => 05606706 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-25 [patent_title] => 'Data storing system and data transfer method' [patent_app_type] => 1 [patent_app_number] => 8/293624 [patent_app_country] => US [patent_app_date] => 1994-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3368 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/606/05606706.pdf [firstpage_image] =>[orig_patent_app_number] => 293624 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/293624
Data storing system and data transfer method Aug 21, 1994 Issued
Array ( [id] => 3540439 [patent_doc_number] => 05542081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-30 [patent_title] => 'IC card designed to receive multiple programs in a progammable memory' [patent_app_type] => 1 [patent_app_number] => 8/294098 [patent_app_country] => US [patent_app_date] => 1994-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1619 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/542/05542081.pdf [firstpage_image] =>[orig_patent_app_number] => 294098 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/294098
IC card designed to receive multiple programs in a progammable memory Aug 21, 1994 Issued
Array ( [id] => 3552676 [patent_doc_number] => 05481693 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Shared register architecture for a dual-instruction-set CPU' [patent_app_type] => 1 [patent_app_number] => 8/277962 [patent_app_country] => US [patent_app_date] => 1994-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8057 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481693.pdf [firstpage_image] =>[orig_patent_app_number] => 277962 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/277962
Shared register architecture for a dual-instruction-set CPU Jul 19, 1994 Issued
08/275463 PROCESSING MODULE FOR PROGRAMMABLE PROCESSING USING COMPUTER GENERATED HOLOGRAMS Jul 13, 1994 Abandoned
Array ( [id] => 3506148 [patent_doc_number] => 05537601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Programmable digital signal processor for performing a plurality of signal processings' [patent_app_type] => 1 [patent_app_number] => 8/272749 [patent_app_country] => US [patent_app_date] => 1994-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 42 [patent_no_of_words] => 9426 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537601.pdf [firstpage_image] =>[orig_patent_app_number] => 272749 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/272749
Programmable digital signal processor for performing a plurality of signal processings Jul 10, 1994 Issued
Array ( [id] => 3826882 [patent_doc_number] => 05832287 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Wideband on-demand video distribution system and method' [patent_app_type] => 1 [patent_app_number] => 8/273334 [patent_app_country] => US [patent_app_date] => 1994-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5200 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/832/05832287.pdf [firstpage_image] =>[orig_patent_app_number] => 273334 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/273334
Wideband on-demand video distribution system and method Jul 10, 1994 Issued
Array ( [id] => 3601755 [patent_doc_number] => 05551046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-27 [patent_title] => 'Method for non-hierarchical lock management in a multi-system shared data environment' [patent_app_type] => 1 [patent_app_number] => 8/271533 [patent_app_country] => US [patent_app_date] => 1994-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8503 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/551/05551046.pdf [firstpage_image] =>[orig_patent_app_number] => 271533 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/271533
Method for non-hierarchical lock management in a multi-system shared data environment Jul 6, 1994 Issued
Array ( [id] => 1592250 [patent_doc_number] => 06360285 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Apparatus for determining memory bank availability in a computer system' [patent_app_type] => B1 [patent_app_number] => 08/269234 [patent_app_country] => US [patent_app_date] => 1994-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11011 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360285.pdf [firstpage_image] =>[orig_patent_app_number] => 08269234 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/269234
Apparatus for determining memory bank availability in a computer system Jun 29, 1994 Issued
Array ( [id] => 3709170 [patent_doc_number] => 05619711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Method and data processing system for arbitrary precision on numbers' [patent_app_type] => 1 [patent_app_number] => 8/267740 [patent_app_country] => US [patent_app_date] => 1994-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9556 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619711.pdf [firstpage_image] =>[orig_patent_app_number] => 267740 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/267740
Method and data processing system for arbitrary precision on numbers Jun 28, 1994 Issued
08/266914 METHOD AND APPARATUS FOR DYNAMICALLY CONTROLLING ADDRESS SPACE ALLOCATION Jun 26, 1994 Abandoned
08/265360 COMMUNICATION DATA PROCESSOR Jun 23, 1994 Abandoned
Array ( [id] => 4380109 [patent_doc_number] => 06192482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Self-timed parallel data bus interface to direct storage devices' [patent_app_type] => 1 [patent_app_number] => 8/261523 [patent_app_country] => US [patent_app_date] => 1994-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3821 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/192/06192482.pdf [firstpage_image] =>[orig_patent_app_number] => 261523 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/261523
Self-timed parallel data bus interface to direct storage devices Jun 16, 1994 Issued
08/260962 OUTPUT APPARATUS AND METHOD USING PLURAL DATA PROCESSING UNITS Jun 14, 1994 Abandoned
Array ( [id] => 3744250 [patent_doc_number] => 05666546 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Method of managing concurrent accesses to a memory by a plurality of users using atomic instructions to prevent read/write errors' [patent_app_type] => 1 [patent_app_number] => 8/260734 [patent_app_country] => US [patent_app_date] => 1994-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1612 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666546.pdf [firstpage_image] =>[orig_patent_app_number] => 260734 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/260734
Method of managing concurrent accesses to a memory by a plurality of users using atomic instructions to prevent read/write errors Jun 14, 1994 Issued
Array ( [id] => 4273796 [patent_doc_number] => 06209081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method and system for nonsequential instruction dispatch and execution in a superscalar processor system' [patent_app_type] => 1 [patent_app_number] => 8/255130 [patent_app_country] => US [patent_app_date] => 1994-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5390 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/209/06209081.pdf [firstpage_image] =>[orig_patent_app_number] => 255130 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/255130
Method and system for nonsequential instruction dispatch and execution in a superscalar processor system Jun 6, 1994 Issued
08/250592 COMPUTER RESET SIGNAL DEBOUNCING CIRCUIT May 26, 1994 Abandoned
08/240349 ANALYZER FOR FREQUENCY MODULATED SIGNALS May 9, 1994 Abandoned
08/237800 NODE ADAPTER INCLUDING ARRANGEMENT FOR FILTERING BROADCAST DATA ON NETWORK May 3, 1994 Abandoned
08/236714 SET-ASSOCIATIVE CACHE MEMORY UTILIZING A SINGLE BANK OF PHYSICAL MEMORY Apr 28, 1994 Abandoned
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