Search

John A. Follansbee

Supervisory Patent Examiner (ID: 2573, Phone: (571)272-3964 , Office: P/2400 )

Most Active Art Unit
2783
Art Unit(s)
2154, 2156, 2712, 2302, 2100, 2126, 2783, 2444, 2451, 2127
Total Applications
601
Issued Applications
382
Pending Applications
86
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4424852 [patent_doc_number] => 06266807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Method and system for executing instructions in an application-specific microprocessor' [patent_app_type] => 1 [patent_app_number] => 9/150218 [patent_app_country] => US [patent_app_date] => 1998-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1977 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/266/06266807.pdf [firstpage_image] =>[orig_patent_app_number] => 150218 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/150218
Method and system for executing instructions in an application-specific microprocessor Sep 8, 1998 Issued
Array ( [id] => 1567494 [patent_doc_number] => 06363472 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method and system for minimizing effect of replacing programming languages in telephony systems' [patent_app_type] => B1 [patent_app_number] => 09/146135 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4536 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363472.pdf [firstpage_image] =>[orig_patent_app_number] => 09146135 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146135
Method and system for minimizing effect of replacing programming languages in telephony systems Sep 2, 1998 Issued
Array ( [id] => 1521759 [patent_doc_number] => 06502184 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Method and apparatus for providing a general purpose stack' [patent_app_type] => B1 [patent_app_number] => 09/145539 [patent_app_country] => US [patent_app_date] => 1998-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3473 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502184.pdf [firstpage_image] =>[orig_patent_app_number] => 09145539 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/145539
Method and apparatus for providing a general purpose stack Sep 1, 1998 Issued
Array ( [id] => 4399444 [patent_doc_number] => 06295597 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Apparatus and method for improved vector processing to support extended-length integer arithmetic' [patent_app_type] => 1 [patent_app_number] => 9/132205 [patent_app_country] => US [patent_app_date] => 1998-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6408 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295597.pdf [firstpage_image] =>[orig_patent_app_number] => 132205 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/132205
Apparatus and method for improved vector processing to support extended-length integer arithmetic Aug 10, 1998 Issued
Array ( [id] => 4295683 [patent_doc_number] => 06324690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Installation of application software through a network from a source computer system on to a target computer system' [patent_app_type] => 1 [patent_app_number] => 9/127116 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3647 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324690.pdf [firstpage_image] =>[orig_patent_app_number] => 127116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127116
Installation of application software through a network from a source computer system on to a target computer system Jul 28, 1998 Issued
Array ( [id] => 1592210 [patent_doc_number] => 06360277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Addressable intelligent relay' [patent_app_type] => B1 [patent_app_number] => 09/121026 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 7497 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360277.pdf [firstpage_image] =>[orig_patent_app_number] => 09121026 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121026
Addressable intelligent relay Jul 21, 1998 Issued
Array ( [id] => 1567489 [patent_doc_number] => 06438679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Multiple ISA support by a processor using primitive operations' [patent_app_type] => B1 [patent_app_number] => 09/120043 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 9339 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438679.pdf [firstpage_image] =>[orig_patent_app_number] => 09120043 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120043
Multiple ISA support by a processor using primitive operations Jul 20, 1998 Issued
Array ( [id] => 4311345 [patent_doc_number] => 06237008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'System and method for enabling pair-pair remote copy storage volumes to mirror data in another storage volume' [patent_app_type] => 1 [patent_app_number] => 9/119124 [patent_app_country] => US [patent_app_date] => 1998-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2893 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237008.pdf [firstpage_image] =>[orig_patent_app_number] => 119124 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119124
System and method for enabling pair-pair remote copy storage volumes to mirror data in another storage volume Jul 19, 1998 Issued
Array ( [id] => 4121185 [patent_doc_number] => 06023735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Expansion module including programmable chip selects' [patent_app_type] => 1 [patent_app_number] => 9/120866 [patent_app_country] => US [patent_app_date] => 1998-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 26010 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023735.pdf [firstpage_image] =>[orig_patent_app_number] => 120866 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120866
Expansion module including programmable chip selects Jul 19, 1998 Issued
Array ( [id] => 1438704 [patent_doc_number] => 06356996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Cache fencing for interpretive environments' [patent_app_type] => B1 [patent_app_number] => 09/118262 [patent_app_country] => US [patent_app_date] => 1998-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 16128 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356996.pdf [firstpage_image] =>[orig_patent_app_number] => 09118262 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/118262
Cache fencing for interpretive environments Jul 16, 1998 Issued
Array ( [id] => 4114606 [patent_doc_number] => 06049859 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Image-processing processor' [patent_app_type] => 1 [patent_app_number] => 9/101702 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6142 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049859.pdf [firstpage_image] =>[orig_patent_app_number] => 101702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/101702
Image-processing processor Jul 14, 1998 Issued
Array ( [id] => 1481832 [patent_doc_number] => 06345370 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Method for debugging error in a computer system' [patent_app_type] => B1 [patent_app_number] => 09/115761 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/345/06345370.pdf [firstpage_image] =>[orig_patent_app_number] => 09115761 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/115761
Method for debugging error in a computer system Jul 14, 1998 Issued
Array ( [id] => 4379317 [patent_doc_number] => 06192433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Automatic SCSI termination readjustment' [patent_app_type] => 1 [patent_app_number] => 9/115144 [patent_app_country] => US [patent_app_date] => 1998-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2328 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/192/06192433.pdf [firstpage_image] =>[orig_patent_app_number] => 115144 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/115144
Automatic SCSI termination readjustment Jul 13, 1998 Issued
Array ( [id] => 1465783 [patent_doc_number] => 06393428 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Natural language information retrieval system' [patent_app_type] => B1 [patent_app_number] => 09/114786 [patent_app_country] => US [patent_app_date] => 1998-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 14448 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393428.pdf [firstpage_image] =>[orig_patent_app_number] => 09114786 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/114786
Natural language information retrieval system Jul 12, 1998 Issued
Array ( [id] => 4115631 [patent_doc_number] => 06067570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Method and system for displaying and interacting with an informational message based on an information processing system event' [patent_app_type] => 1 [patent_app_number] => 9/113453 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 8437 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067570.pdf [firstpage_image] =>[orig_patent_app_number] => 113453 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/113453
Method and system for displaying and interacting with an informational message based on an information processing system event Jul 9, 1998 Issued
Array ( [id] => 1462307 [patent_doc_number] => 06427163 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Highly scalable and highly available cluster system management scheme' [patent_app_type] => B1 [patent_app_number] => 09/114051 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5968 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427163.pdf [firstpage_image] =>[orig_patent_app_number] => 09114051 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/114051
Highly scalable and highly available cluster system management scheme Jul 9, 1998 Issued
Array ( [id] => 4329537 [patent_doc_number] => 06331946 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Method for protecting on-chip memory (flash and RAM) against attacks' [patent_app_type] => 1 [patent_app_number] => 9/112737 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 925 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/331/06331946.pdf [firstpage_image] =>[orig_patent_app_number] => 112737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/112737
Method for protecting on-chip memory (flash and RAM) against attacks Jul 9, 1998 Issued
Array ( [id] => 4255216 [patent_doc_number] => 06119215 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Synchronization and control system for an arrayed processing engine' [patent_app_type] => 1 [patent_app_number] => 9/106246 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/119/06119215.pdf [firstpage_image] =>[orig_patent_app_number] => 106246 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/106246
Synchronization and control system for an arrayed processing engine Jun 28, 1998 Issued
Array ( [id] => 4426922 [patent_doc_number] => 06195739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Method and apparatus for passing data among processor complex stages of a pipelined processing engine' [patent_app_type] => 1 [patent_app_number] => 9/106436 [patent_app_country] => US [patent_app_date] => 1998-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7284 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195739.pdf [firstpage_image] =>[orig_patent_app_number] => 106436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/106436
Method and apparatus for passing data among processor complex stages of a pipelined processing engine Jun 28, 1998 Issued
Array ( [id] => 4167100 [patent_doc_number] => 06065089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Method and apparatus for coalescing I/O interrupts that efficiently balances performance and latency' [patent_app_type] => 1 [patent_app_number] => 9/104487 [patent_app_country] => US [patent_app_date] => 1998-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 6352 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065089.pdf [firstpage_image] =>[orig_patent_app_number] => 104487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/104487
Method and apparatus for coalescing I/O interrupts that efficiently balances performance and latency Jun 24, 1998 Issued
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