Search

John A. Follansbee

Supervisory Patent Examiner (ID: 9488, Phone: (571)272-3964 , Office: P/2400 )

Most Active Art Unit
2783
Art Unit(s)
2127, 2100, 2156, 2451, 2783, 2126, 2444, 2712, 2302, 2154
Total Applications
608
Issued Applications
384
Pending Applications
91
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4267973 [patent_doc_number] => 06138136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Signal processor' [patent_app_type] => 1 [patent_app_number] => 9/011673 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7207 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138136.pdf [firstpage_image] =>[orig_patent_app_number] => 011673 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/011673
Signal processor Oct 22, 1998 Issued
Array ( [id] => 1497864 [patent_doc_number] => 06343356 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision' [patent_app_type] => B1 [patent_app_number] => 09/169255 [patent_app_country] => US [patent_app_date] => 1998-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4476 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/343/06343356.pdf [firstpage_image] =>[orig_patent_app_number] => 09169255 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/169255
Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision Oct 8, 1998 Issued
Array ( [id] => 4371334 [patent_doc_number] => 06216220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Multithreaded data processing method with long latency subinstructions' [patent_app_type] => 1 [patent_app_number] => 9/168068 [patent_app_country] => US [patent_app_date] => 1998-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3559 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216220.pdf [firstpage_image] =>[orig_patent_app_number] => 168068 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/168068
Multithreaded data processing method with long latency subinstructions Oct 7, 1998 Issued
Array ( [id] => 4280044 [patent_doc_number] => 06205535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Branch instruction having different field lengths for unconditional and conditional displacements' [patent_app_type] => 1 [patent_app_number] => 9/167029 [patent_app_country] => US [patent_app_date] => 1998-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 87 [patent_figures_cnt] => 113 [patent_no_of_words] => 38589 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205535.pdf [firstpage_image] =>[orig_patent_app_number] => 167029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/167029
Branch instruction having different field lengths for unconditional and conditional displacements Oct 5, 1998 Issued
Array ( [id] => 1553810 [patent_doc_number] => 06347369 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Method and circuit for single cycle multiple branch history table access' [patent_app_type] => B1 [patent_app_number] => 09/159900 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9939 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347369.pdf [firstpage_image] =>[orig_patent_app_number] => 09159900 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159900
Method and circuit for single cycle multiple branch history table access Sep 23, 1998 Issued
Array ( [id] => 4421542 [patent_doc_number] => 06233602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Dynamically allocating server processes to client processes' [patent_app_type] => 1 [patent_app_number] => 9/158935 [patent_app_country] => US [patent_app_date] => 1998-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7692 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233602.pdf [firstpage_image] =>[orig_patent_app_number] => 158935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/158935
Dynamically allocating server processes to client processes Sep 21, 1998 Issued
Array ( [id] => 4423904 [patent_doc_number] => 06240521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Sleep mode transition between processors sharing an instruction set and an address space' [patent_app_type] => 1 [patent_app_number] => 9/151133 [patent_app_country] => US [patent_app_date] => 1998-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3246 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240521.pdf [firstpage_image] =>[orig_patent_app_number] => 151133 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/151133
Sleep mode transition between processors sharing an instruction set and an address space Sep 9, 1998 Issued
Array ( [id] => 4424852 [patent_doc_number] => 06266807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Method and system for executing instructions in an application-specific microprocessor' [patent_app_type] => 1 [patent_app_number] => 9/150218 [patent_app_country] => US [patent_app_date] => 1998-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1977 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/266/06266807.pdf [firstpage_image] =>[orig_patent_app_number] => 150218 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/150218
Method and system for executing instructions in an application-specific microprocessor Sep 8, 1998 Issued
Array ( [id] => 1567494 [patent_doc_number] => 06363472 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method and system for minimizing effect of replacing programming languages in telephony systems' [patent_app_type] => B1 [patent_app_number] => 09/146135 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4536 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363472.pdf [firstpage_image] =>[orig_patent_app_number] => 09146135 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146135
Method and system for minimizing effect of replacing programming languages in telephony systems Sep 2, 1998 Issued
Array ( [id] => 1521759 [patent_doc_number] => 06502184 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Method and apparatus for providing a general purpose stack' [patent_app_type] => B1 [patent_app_number] => 09/145539 [patent_app_country] => US [patent_app_date] => 1998-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3473 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502184.pdf [firstpage_image] =>[orig_patent_app_number] => 09145539 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/145539
Method and apparatus for providing a general purpose stack Sep 1, 1998 Issued
Array ( [id] => 4399444 [patent_doc_number] => 06295597 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Apparatus and method for improved vector processing to support extended-length integer arithmetic' [patent_app_type] => 1 [patent_app_number] => 9/132205 [patent_app_country] => US [patent_app_date] => 1998-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6408 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295597.pdf [firstpage_image] =>[orig_patent_app_number] => 132205 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/132205
Apparatus and method for improved vector processing to support extended-length integer arithmetic Aug 10, 1998 Issued
Array ( [id] => 4295683 [patent_doc_number] => 06324690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Installation of application software through a network from a source computer system on to a target computer system' [patent_app_type] => 1 [patent_app_number] => 9/127116 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3647 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324690.pdf [firstpage_image] =>[orig_patent_app_number] => 127116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127116
Installation of application software through a network from a source computer system on to a target computer system Jul 28, 1998 Issued
Array ( [id] => 1592210 [patent_doc_number] => 06360277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Addressable intelligent relay' [patent_app_type] => B1 [patent_app_number] => 09/121026 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 7497 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360277.pdf [firstpage_image] =>[orig_patent_app_number] => 09121026 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121026
Addressable intelligent relay Jul 21, 1998 Issued
Array ( [id] => 1567489 [patent_doc_number] => 06438679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Multiple ISA support by a processor using primitive operations' [patent_app_type] => B1 [patent_app_number] => 09/120043 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 9339 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438679.pdf [firstpage_image] =>[orig_patent_app_number] => 09120043 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120043
Multiple ISA support by a processor using primitive operations Jul 20, 1998 Issued
Array ( [id] => 4311345 [patent_doc_number] => 06237008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'System and method for enabling pair-pair remote copy storage volumes to mirror data in another storage volume' [patent_app_type] => 1 [patent_app_number] => 9/119124 [patent_app_country] => US [patent_app_date] => 1998-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2893 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237008.pdf [firstpage_image] =>[orig_patent_app_number] => 119124 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119124
System and method for enabling pair-pair remote copy storage volumes to mirror data in another storage volume Jul 19, 1998 Issued
Array ( [id] => 4121185 [patent_doc_number] => 06023735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Expansion module including programmable chip selects' [patent_app_type] => 1 [patent_app_number] => 9/120866 [patent_app_country] => US [patent_app_date] => 1998-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 26010 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023735.pdf [firstpage_image] =>[orig_patent_app_number] => 120866 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/120866
Expansion module including programmable chip selects Jul 19, 1998 Issued
Array ( [id] => 1438704 [patent_doc_number] => 06356996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Cache fencing for interpretive environments' [patent_app_type] => B1 [patent_app_number] => 09/118262 [patent_app_country] => US [patent_app_date] => 1998-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 16128 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356996.pdf [firstpage_image] =>[orig_patent_app_number] => 09118262 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/118262
Cache fencing for interpretive environments Jul 16, 1998 Issued
Array ( [id] => 1481832 [patent_doc_number] => 06345370 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Method for debugging error in a computer system' [patent_app_type] => B1 [patent_app_number] => 09/115761 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/345/06345370.pdf [firstpage_image] =>[orig_patent_app_number] => 09115761 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/115761
Method for debugging error in a computer system Jul 14, 1998 Issued
Array ( [id] => 4114606 [patent_doc_number] => 06049859 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Image-processing processor' [patent_app_type] => 1 [patent_app_number] => 9/101702 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6142 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049859.pdf [firstpage_image] =>[orig_patent_app_number] => 101702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/101702
Image-processing processor Jul 14, 1998 Issued
Array ( [id] => 4379317 [patent_doc_number] => 06192433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Automatic SCSI termination readjustment' [patent_app_type] => 1 [patent_app_number] => 9/115144 [patent_app_country] => US [patent_app_date] => 1998-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2328 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/192/06192433.pdf [firstpage_image] =>[orig_patent_app_number] => 115144 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/115144
Automatic SCSI termination readjustment Jul 13, 1998 Issued
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