
John A. Lane
Examiner (ID: 16902, Phone: (571)272-4208 , Office: P/2139 )
| Most Active Art Unit | 2139 |
| Art Unit(s) | 2309, 2139, 2185, 2188, 2751, 2189, 2186, 2305, 2303, 2312 |
| Total Applications | 2052 |
| Issued Applications | 1798 |
| Pending Applications | 47 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9954299
[patent_doc_number] => 09003111
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-07
[patent_title] => 'Methods and apparatus providing high-speed content addressable memory (CAM) search-invalidates'
[patent_app_type] => utility
[patent_app_number] => 13/969636
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 7608
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969636
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/969636 | Methods and apparatus providing high-speed content addressable memory (CAM) search-invalidates | Aug 18, 2013 | Issued |
Array
(
[id] => 10188720
[patent_doc_number] => 09218139
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-22
[patent_title] => 'Minimally disruptive virtual machine snapshots'
[patent_app_type] => utility
[patent_app_number] => 13/968722
[patent_app_country] => US
[patent_app_date] => 2013-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6024
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968722
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/968722 | Minimally disruptive virtual machine snapshots | Aug 15, 2013 | Issued |
Array
(
[id] => 9774323
[patent_doc_number] => 20140297986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-02
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/968581
[patent_app_country] => US
[patent_app_date] => 2013-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6292
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968581
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/968581 | Semiconductor memory devices and semiconductor systems including the same | Aug 15, 2013 | Issued |
Array
(
[id] => 10117660
[patent_doc_number] => 09152545
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-10-06
[patent_title] => 'Read-write access in a read-only environment'
[patent_app_type] => utility
[patent_app_number] => 13/966065
[patent_app_country] => US
[patent_app_date] => 2013-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7272
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13966065
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/966065 | Read-write access in a read-only environment | Aug 12, 2013 | Issued |
Array
(
[id] => 10194800
[patent_doc_number] => 09223711
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-29
[patent_title] => 'Combining associativity and cuckoo hashing'
[patent_app_type] => utility
[patent_app_number] => 13/965668
[patent_app_country] => US
[patent_app_date] => 2013-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 10877
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13965668
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/965668 | Combining associativity and cuckoo hashing | Aug 12, 2013 | Issued |
Array
(
[id] => 10117458
[patent_doc_number] => 09152342
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-10-06
[patent_title] => 'Read-write access in a read-only environment'
[patent_app_type] => utility
[patent_app_number] => 13/966163
[patent_app_country] => US
[patent_app_date] => 2013-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7031
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13966163
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/966163 | Read-write access in a read-only environment | Aug 12, 2013 | Issued |
Array
(
[id] => 10092844
[patent_doc_number] => 09129672
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-08
[patent_title] => 'Semiconductor device and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/964489
[patent_app_country] => US
[patent_app_date] => 2013-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5515
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13964489
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/964489 | Semiconductor device and operating method thereof | Aug 11, 2013 | Issued |
Array
(
[id] => 9150484
[patent_doc_number] => 20130305007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-14
[patent_title] => 'MEMORY MANAGEMENT METHOD, MEMORY MANAGEMENT DEVICE, MEMORY MANAGEMENT CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/941593
[patent_app_country] => US
[patent_app_date] => 2013-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8945
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13941593
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/941593 | MEMORY MANAGEMENT METHOD, MEMORY MANAGEMENT DEVICE, MEMORY MANAGEMENT CIRCUIT | Jul 14, 2013 | Abandoned |
Array
(
[id] => 9207549
[patent_doc_number] => 20140006726
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'STORAGE SYSTEM COMPRISING MULTIPLE STORAGE APPARATUSES WITH BOTH STORAGE VIRTUALIZATION FUNCTION AND CAPACITY VIRTUALIZATION FUNCTION'
[patent_app_type] => utility
[patent_app_number] => 13/938572
[patent_app_country] => US
[patent_app_date] => 2013-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 15233
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13938572
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/938572 | Storage system comprising multiple storage apparatuses with both storage virtualization function and capacity virtualization function | Jul 9, 2013 | Issued |
Array
(
[id] => 10085241
[patent_doc_number] => 09122589
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-09-01
[patent_title] => 'Data storage system with unified system cache'
[patent_app_type] => utility
[patent_app_number] => 13/930164
[patent_app_country] => US
[patent_app_date] => 2013-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8941
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13930164
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/930164 | Data storage system with unified system cache | Jun 27, 2013 | Issued |
Array
(
[id] => 9150451
[patent_doc_number] => 20130304974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-14
[patent_title] => 'SYSTEM AND METHOD FOR STORING DATA USING A FLEXIBLE DATA FORMAT'
[patent_app_type] => utility
[patent_app_number] => 13/925789
[patent_app_country] => US
[patent_app_date] => 2013-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6733
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925789
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925789 | SYSTEM AND METHOD FOR STORING DATA USING A FLEXIBLE DATA FORMAT | Jun 23, 2013 | Abandoned |
Array
(
[id] => 10928012
[patent_doc_number] => 20140331033
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-06
[patent_title] => 'FIRMWARE CODE LOADING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/925816
[patent_app_country] => US
[patent_app_date] => 2013-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8850
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925816
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925816 | Firmware code loading method, memory controller and memory storage apparatus | Jun 23, 2013 | Issued |
Array
(
[id] => 10015260
[patent_doc_number] => 09058274
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'System and method of selective READ cache retention for a rebooted node of a multiple-node storage cluster'
[patent_app_type] => utility
[patent_app_number] => 13/924773
[patent_app_country] => US
[patent_app_date] => 2013-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3127
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924773
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/924773 | System and method of selective READ cache retention for a rebooted node of a multiple-node storage cluster | Jun 23, 2013 | Issued |
Array
(
[id] => 10157607
[patent_doc_number] => 09189387
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-11-17
[patent_title] => 'Combined memory and storage tiering'
[patent_app_type] => utility
[patent_app_number] => 13/925143
[patent_app_country] => US
[patent_app_date] => 2013-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 6724
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925143
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925143 | Combined memory and storage tiering | Jun 23, 2013 | Issued |
Array
(
[id] => 10099682
[patent_doc_number] => 09135997
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-15
[patent_title] => 'System and method for filtering addresses'
[patent_app_type] => utility
[patent_app_number] => 13/925331
[patent_app_country] => US
[patent_app_date] => 2013-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 9497
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925331
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925331 | System and method for filtering addresses | Jun 23, 2013 | Issued |
Array
(
[id] => 9444133
[patent_doc_number] => 08713264
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-29
[patent_title] => 'Data processing circuit with arbitration between a plurality of queues'
[patent_app_type] => utility
[patent_app_number] => 13/906224
[patent_app_country] => US
[patent_app_date] => 2013-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 7760
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13906224
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/906224 | Data processing circuit with arbitration between a plurality of queues | May 29, 2013 | Issued |
Array
(
[id] => 9707265
[patent_doc_number] => 08832360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Solid state storage device controller with expansion mode'
[patent_app_type] => utility
[patent_app_number] => 13/901806
[patent_app_country] => US
[patent_app_date] => 2013-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4675
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13901806
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/901806 | Solid state storage device controller with expansion mode | May 23, 2013 | Issued |
Array
(
[id] => 10941523
[patent_doc_number] => 20140344545
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'PARALLEL ATOMIC INCREMENT'
[patent_app_type] => utility
[patent_app_number] => 13/896588
[patent_app_country] => US
[patent_app_date] => 2013-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5641
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13896588
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/896588 | Parallel atomic increment | May 16, 2013 | Issued |
Array
(
[id] => 9998919
[patent_doc_number] => 09043536
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-26
[patent_title] => 'Method of recording mapping information, and memory controller and memory storage apparatus using the same'
[patent_app_type] => utility
[patent_app_number] => 13/896328
[patent_app_country] => US
[patent_app_date] => 2013-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 23
[patent_no_of_words] => 11114
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13896328
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/896328 | Method of recording mapping information, and memory controller and memory storage apparatus using the same | May 16, 2013 | Issued |
Array
(
[id] => 9176326
[patent_doc_number] => 20130318311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-28
[patent_title] => 'SYSTEM-ON-CHIP FOR PROVIDING ACCESS TO SHARED MEMORY VIA CHIP-TO-CHIP LINK, OPERATION METHOD OF THE SAME, AND ELECTRONIC SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/895606
[patent_app_country] => US
[patent_app_date] => 2013-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5739
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13895606
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/895606 | System-on-chip for providing access to shared memory via chip-to-chip link, operation method of the same, and electronic system including the same | May 15, 2013 | Issued |