
John A. Lane
Examiner (ID: 16902, Phone: (571)272-4208 , Office: P/2139 )
| Most Active Art Unit | 2139 |
| Art Unit(s) | 2309, 2139, 2185, 2188, 2751, 2189, 2186, 2305, 2303, 2312 |
| Total Applications | 2052 |
| Issued Applications | 1798 |
| Pending Applications | 47 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6531703
[patent_doc_number] => 20100217918
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-26
[patent_title] => 'DATA STORAGE DEVICE AND METHOD FOR ACCESSING FLASH MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/497665
[patent_app_country] => US
[patent_app_date] => 2009-07-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2876
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20100217918.pdf
[firstpage_image] =>[orig_patent_app_number] => 12497665
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/497665 | Data storage device and method for accessing flash memory | Jul 3, 2009 | Issued |
Array
(
[id] => 6100378
[patent_doc_number] => 20110004721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-06
[patent_title] => 'LOADING SECURE CODE INTO A MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/497227
[patent_app_country] => US
[patent_app_date] => 2009-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6579
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0004/20110004721.pdf
[firstpage_image] =>[orig_patent_app_number] => 12497227
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/497227 | Loading secure code into a memory | Jul 1, 2009 | Issued |
Array
(
[id] => 5559990
[patent_doc_number] => 20090271567
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-29
[patent_title] => 'METHODS FOR MANAGING BLOCKS IN FLASH MEMORIES'
[patent_app_type] => utility
[patent_app_number] => 12/497368
[patent_app_country] => US
[patent_app_date] => 2009-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4865
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0271/20090271567.pdf
[firstpage_image] =>[orig_patent_app_number] => 12497368
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/497368 | Methods for managing blocks in flash memories | Jul 1, 2009 | Issued |
Array
(
[id] => 8297264
[patent_doc_number] => 08225061
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-17
[patent_title] => 'Method and apparatus for protected content data processing'
[patent_app_type] => utility
[patent_app_number] => 12/497522
[patent_app_country] => US
[patent_app_date] => 2009-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6405
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12497522
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/497522 | Method and apparatus for protected content data processing | Jul 1, 2009 | Issued |
Array
(
[id] => 6100388
[patent_doc_number] => 20110004728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-06
[patent_title] => 'ON-DEVICE DATA COMPRESSION FOR NON-VOLATILE MEMORY-BASED MASS STORAGE DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/496685
[patent_app_country] => US
[patent_app_date] => 2009-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2045
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0004/20110004728.pdf
[firstpage_image] =>[orig_patent_app_number] => 12496685
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/496685 | ON-DEVICE DATA COMPRESSION FOR NON-VOLATILE MEMORY-BASED MASS STORAGE DEVICES | Jul 1, 2009 | Abandoned |
Array
(
[id] => 6240874
[patent_doc_number] => 20100268903
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-21
[patent_title] => 'COMPUTER SYSTEM COMPRISING STORAGE OPERATION PERMISSION MANAGEMENT'
[patent_app_type] => utility
[patent_app_number] => 12/497141
[patent_app_country] => US
[patent_app_date] => 2009-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8907
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0268/20100268903.pdf
[firstpage_image] =>[orig_patent_app_number] => 12497141
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/497141 | Computer system comprising storage operation permission management | Jul 1, 2009 | Issued |
Array
(
[id] => 6425093
[patent_doc_number] => 20100277825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-04
[patent_title] => 'HARD DISK ACCESS METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/495810
[patent_app_country] => US
[patent_app_date] => 2009-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1536
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0277/20100277825.pdf
[firstpage_image] =>[orig_patent_app_number] => 12495810
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/495810 | HARD DISK ACCESS METHOD | Jun 30, 2009 | Abandoned |
Array
(
[id] => 8022587
[patent_doc_number] => 08140812
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-20
[patent_title] => 'Method and apparatus for two-phase storage-aware placement of virtual machines'
[patent_app_type] => utility
[patent_app_number] => 12/496425
[patent_app_country] => US
[patent_app_date] => 2009-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 18007
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/140/08140812.pdf
[firstpage_image] =>[orig_patent_app_number] => 12496425
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/496425 | Method and apparatus for two-phase storage-aware placement of virtual machines | Jun 30, 2009 | Issued |
Array
(
[id] => 8220057
[patent_doc_number] => 08195917
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-05
[patent_title] => 'Extended page size using aggregated small pages'
[patent_app_type] => utility
[patent_app_number] => 12/496335
[patent_app_country] => US
[patent_app_date] => 2009-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5745
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/195/08195917.pdf
[firstpage_image] =>[orig_patent_app_number] => 12496335
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/496335 | Extended page size using aggregated small pages | Jun 30, 2009 | Issued |
Array
(
[id] => 6510241
[patent_doc_number] => 20100011186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-14
[patent_title] => 'SYNCHRONIZING A TRANSLATION LOOKASIDE BUFFER WITH AN EXTENDED PAGING TABLE'
[patent_app_type] => utility
[patent_app_number] => 12/495555
[patent_app_country] => US
[patent_app_date] => 2009-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6900
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0011/20100011186.pdf
[firstpage_image] =>[orig_patent_app_number] => 12495555
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/495555 | Synchronizing a translation lookaside buffer with an extended paging table | Jun 29, 2009 | Issued |
Array
(
[id] => 5535233
[patent_doc_number] => 20090235021
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-09-17
[patent_title] => 'EFFICIENTLY SYNCHRONIZING WITH SEPARATED DISK CACHES'
[patent_app_type] => utility
[patent_app_number] => 12/473327
[patent_app_country] => US
[patent_app_date] => 2009-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7595
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20090235021.pdf
[firstpage_image] =>[orig_patent_app_number] => 12473327
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/473327 | Efficiently synchronizing with separated disk caches | May 27, 2009 | Issued |
Array
(
[id] => 5571347
[patent_doc_number] => 20090254726
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-08
[patent_title] => 'METHOD OF ADDRESS SPACE LAYOUT RANDOMIZATION FOR WINDOWS OPERATING SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 12/467700
[patent_app_country] => US
[patent_app_date] => 2009-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6883
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0254/20090254726.pdf
[firstpage_image] =>[orig_patent_app_number] => 12467700
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/467700 | Method of address space layout randomization for windows operating systems | May 17, 2009 | Issued |
Array
(
[id] => 9348083
[patent_doc_number] => 08667246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-04
[patent_title] => 'System for virtual disks version control'
[patent_app_type] => utility
[patent_app_number] => 13/320272
[patent_app_country] => US
[patent_app_date] => 2009-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 7430
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13320272
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/320272 | System for virtual disks version control | May 12, 2009 | Issued |
Array
(
[id] => 5571341
[patent_doc_number] => 20090254720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-08
[patent_title] => 'SYSTEM FOR REBUILDING DISPERSED DATA'
[patent_app_type] => utility
[patent_app_number] => 12/431166
[patent_app_country] => US
[patent_app_date] => 2009-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 8159
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0254/20090254720.pdf
[firstpage_image] =>[orig_patent_app_number] => 12431166
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/431166 | System for rebuilding dispersed data | Apr 27, 2009 | Issued |
Array
(
[id] => 7589683
[patent_doc_number] => 07664926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-16
[patent_title] => 'Storage apparatus and storage area allocation method'
[patent_app_type] => utility
[patent_app_number] => 12/453042
[patent_app_country] => US
[patent_app_date] => 2009-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 9358
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/664/07664926.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453042
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453042 | Storage apparatus and storage area allocation method | Apr 27, 2009 | Issued |
Array
(
[id] => 58100
[patent_doc_number] => 07774569
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-08-10
[patent_title] => 'Locking and synchronizing input/output operations in a data storage system'
[patent_app_type] => utility
[patent_app_number] => 12/425158
[patent_app_country] => US
[patent_app_date] => 2009-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10825
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/774/07774569.pdf
[firstpage_image] =>[orig_patent_app_number] => 12425158
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/425158 | Locking and synchronizing input/output operations in a data storage system | Apr 15, 2009 | Issued |
Array
(
[id] => 5381363
[patent_doc_number] => 20090193202
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-30
[patent_title] => 'MULTI-COLUMN ADDRESSING MODE MEMORY SYSTEM INCLUDING AN INTEGRATED CIRCUIT MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/391873
[patent_app_country] => US
[patent_app_date] => 2009-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8344
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0193/20090193202.pdf
[firstpage_image] =>[orig_patent_app_number] => 12391873
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/391873 | Multi-column addressing mode memory system including an integrated circuit memory device | Feb 23, 2009 | Issued |
Array
(
[id] => 6478501
[patent_doc_number] => 20100191894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'Digital Data Architecture Employing Redundant Links in a Daisy Chain of Component Modules'
[patent_app_type] => utility
[patent_app_number] => 12/361666
[patent_app_country] => US
[patent_app_date] => 2009-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 13591
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0191/20100191894.pdf
[firstpage_image] =>[orig_patent_app_number] => 12361666
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/361666 | Digital data architecture employing redundant links in a daisy chain of component modules | Jan 28, 2009 | Issued |
Array
(
[id] => 6234227
[patent_doc_number] => 20100185830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'LOGICAL ADDRESS OFFSET'
[patent_app_type] => utility
[patent_app_number] => 12/356765
[patent_app_country] => US
[patent_app_date] => 2009-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7960
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20100185830.pdf
[firstpage_image] =>[orig_patent_app_number] => 12356765
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/356765 | Logical address offset in response to detecting a memory formatting operation | Jan 20, 2009 | Issued |
Array
(
[id] => 4440940
[patent_doc_number] => 07971024
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-06-28
[patent_title] => 'Off-chip micro control and interface in a multichip integrated memory system'
[patent_app_type] => utility
[patent_app_number] => 12/351707
[patent_app_country] => US
[patent_app_date] => 2009-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3752
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/971/07971024.pdf
[firstpage_image] =>[orig_patent_app_number] => 12351707
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/351707 | Off-chip micro control and interface in a multichip integrated memory system | Jan 8, 2009 | Issued |