John A. Lane

Array ( [id] => 4895223 [patent_doc_number] => 20080104323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'METHOD FOR IDENTIFYING, TRACKING, AND STORING HOT CACHE LINES IN AN SMP ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 11/553268 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1481 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20080104323.pdf [firstpage_image] =>[orig_patent_app_number] => 11553268 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 301896 [patent_doc_number] => 07539811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'Scaleable memory systems using third dimension memory' [patent_app_type] => utility [patent_app_number] => 11/543502 [patent_app_country] => US [patent_app_date] => 2006-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3449 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/539/07539811.pdf [firstpage_image] =>[orig_patent_app_number] => 11543502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5221374 [patent_doc_number] => 20070162686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Recording device, recording-medium-management method, program of recording-medium-management method, and recording medium recording program of recording-medium-management method' [patent_app_type] => utility [patent_app_number] => 11/543927 [patent_app_country] => US [patent_app_date] => 2006-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11370 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20070162686.pdf [firstpage_image] =>[orig_patent_app_number] => 11543927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5048849 [patent_doc_number] => 20070029393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'MEMORY CARD AUTHENTICATION SYSTEM, MEMORY CARD HOST DEVICE, MEMORY CARD, STORAGE AREA SWITCHING METHOD, AND STORAGE AREA SWITCHING PROGRAM' [patent_app_type] => utility [patent_app_number] => 11/537766 [patent_app_country] => US [patent_app_date] => 2006-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5533 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029393.pdf [firstpage_image] =>[orig_patent_app_number] => 11537766 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4945448 [patent_doc_number] => 20080082775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'System for phased garbage collection' [patent_app_type] => utility [patent_app_number] => 11/541371 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7414 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20080082775.pdf [firstpage_image] =>[orig_patent_app_number] => 11541371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4945269 [patent_doc_number] => 20080082596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Method for phased garbage collection' [patent_app_type] => utility [patent_app_number] => 11/540778 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7341 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20080082596.pdf [firstpage_image] =>[orig_patent_app_number] => 11540778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 598975 [patent_doc_number] => 07444462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Methods for phased garbage collection using phased garbage collection block or scratch pad block as a buffer' [patent_app_type] => utility [patent_app_number] => 11/541035 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 11996 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/444/07444462.pdf [firstpage_image] =>[orig_patent_app_number] => 11541035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4945401 [patent_doc_number] => 20080082728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Memory systems for phased garbage collection using phased garbage collection block or scratch pad block as a buffer' [patent_app_type] => utility [patent_app_number] => 11/541012 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12081 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20080082728.pdf [firstpage_image] =>[orig_patent_app_number] => 11541012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8594826 [patent_doc_number] => 08352709 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-08 [patent_title] => 'Direct memory access techniques that include caching segmentation data' [patent_app_type] => utility [patent_app_number] => 11/523830 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3229 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11523830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8580833 [patent_doc_number] => 08347064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-01 [patent_title] => 'Memory access techniques in an aperture mapped memory space' [patent_app_type] => utility [patent_app_number] => 11/523926 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4958 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11523926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7598127 [patent_doc_number] => 07584326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-01 [patent_title] => 'Method and system for maximum residency replacement of cache memory' [patent_app_type] => utility [patent_app_number] => 11/531111 [patent_app_country] => US [patent_app_date] => 2006-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6142 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/584/07584326.pdf [firstpage_image] =>[orig_patent_app_number] => 11531111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5190313 [patent_doc_number] => 20070168622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Processor architecture' [patent_app_type] => utility [patent_app_number] => 11/504962 [patent_app_country] => US [patent_app_date] => 2006-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6418 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20070168622.pdf [firstpage_image] =>[orig_patent_app_number] => 11504962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4671612 [patent_doc_number] => 20080046673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'METHOD AND SYSTEM TO OPTIMIZE JAVA VIRTUAL MACHINE PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 11/464944 [patent_app_country] => US [patent_app_date] => 2006-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6843 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046673.pdf [firstpage_image] =>[orig_patent_app_number] => 11464944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 294115 [patent_doc_number] => 07546415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Apparatus, system, and method for integrating multiple raid storage instances within a blade center' [patent_app_type] => utility [patent_app_number] => 11/464701 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6927 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/546/07546415.pdf [firstpage_image] =>[orig_patent_app_number] => 11464701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 283939 [patent_doc_number] => 07555628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Synchronizing a translation lookaside buffer to an extended paging table' [patent_app_type] => utility [patent_app_number] => 11/504964 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6844 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/555/07555628.pdf [firstpage_image] =>[orig_patent_app_number] => 11504964 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 294130 [patent_doc_number] => 07546430 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-06-09 [patent_title] => 'Method of address space layout randomization for windows operating systems' [patent_app_type] => utility [patent_app_number] => 11/464749 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6853 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/546/07546430.pdf [firstpage_image] =>[orig_patent_app_number] => 11464749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4671605 [patent_doc_number] => 20080046666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'SYSTEMS AND METHODS FOR PROGRAM DIRECTED MEMORY ACCESS PATTERNS' [patent_app_type] => utility [patent_app_number] => 11/464503 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9510 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046666.pdf [firstpage_image] =>[orig_patent_app_number] => 11464503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7687860 [patent_doc_number] => 20070106838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Apparatus and method for controlling refresh of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/504421 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6337 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20070106838.pdf [firstpage_image] =>[orig_patent_app_number] => 11504421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4653298 [patent_doc_number] => 20080040555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'Selectively inclusive cache architecture' [patent_app_type] => utility [patent_app_number] => 11/503777 [patent_app_country] => US [patent_app_date] => 2006-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4357 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20080040555.pdf [firstpage_image] =>[orig_patent_app_number] => 11503777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 248799 [patent_doc_number] => 07587559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-08 [patent_title] => 'Systems and methods for memory module power management' [patent_app_type] => utility [patent_app_number] => 11/463743 [patent_app_country] => US [patent_app_date] => 2006-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9603 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/587/07587559.pdf [firstpage_image] =>[orig_patent_app_number] => 11463743 [rel_patent_id] =>[rel_patent_doc_number] =>)