
John A. Lane
Examiner (ID: 16902, Phone: (571)272-4208 , Office: P/2139 )
| Most Active Art Unit | 2139 |
| Art Unit(s) | 2309, 2139, 2185, 2188, 2751, 2189, 2186, 2305, 2303, 2312 |
| Total Applications | 2052 |
| Issued Applications | 1798 |
| Pending Applications | 47 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5806361
[patent_doc_number] => 20060092714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Semiconductor memory device with simplified data control signals'
[patent_app_type] => utility
[patent_app_number] => 11/044976
[patent_app_country] => US
[patent_app_date] => 2005-01-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0092/20060092714.pdf
[firstpage_image] =>[orig_patent_app_number] => 11044976
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/044976 | Semiconductor memory device with simplified data control signals | Jan 25, 2005 | Issued |
Array
(
[id] => 5879113
[patent_doc_number] => 20060168406
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[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Balanced bitcell design for a multi-port register file'
[patent_app_type] => utility
[patent_app_number] => 11/042026
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[patent_app_date] => 2005-01-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/042026 | Balanced bitcell for a multi-port register file | Jan 24, 2005 | Issued |
Array
(
[id] => 7049636
[patent_doc_number] => 20050185523
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[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Storage apparatus with a function for displaying volume information'
[patent_app_type] => utility
[patent_app_number] => 11/028622
[patent_app_country] => US
[patent_app_date] => 2005-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2012
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[pdf_file] => publications/A1/0185/20050185523.pdf
[firstpage_image] =>[orig_patent_app_number] => 11028622
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028622 | Storage apparatus with a function for displaying volume information | Jan 4, 2005 | Abandoned |
Array
(
[id] => 929608
[patent_doc_number] => 07315920
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-01
[patent_title] => 'Circuit and method for protecting vector tags in high performance microprocessors'
[patent_app_type] => utility
[patent_app_number] => 11/028293
[patent_app_country] => US
[patent_app_date] => 2005-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[firstpage_image] =>[orig_patent_app_number] => 11028293
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/028293 | Circuit and method for protecting vector tags in high performance microprocessors | Jan 3, 2005 | Issued |
Array
(
[id] => 877493
[patent_doc_number] => 07363440
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-04-22
[patent_title] => 'System and method for dynamically accessing memory while under normal functional operating conditions'
[patent_app_type] => utility
[patent_app_number] => 11/026843
[patent_app_country] => US
[patent_app_date] => 2004-12-30
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[pdf_file] => patents/07/363/07363440.pdf
[firstpage_image] =>[orig_patent_app_number] => 11026843
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/026843 | System and method for dynamically accessing memory while under normal functional operating conditions | Dec 29, 2004 | Issued |
Array
(
[id] => 823321
[patent_doc_number] => 07409495
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[patent_kind] => B1
[patent_issue_date] => 2008-08-05
[patent_title] => 'Method and apparatus for providing a temporal storage appliance with block virtualization in storage networks'
[patent_app_type] => utility
[patent_app_number] => 11/020863
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[patent_app_date] => 2004-12-22
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[pdf_file] => patents/07/409/07409495.pdf
[firstpage_image] =>[orig_patent_app_number] => 11020863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/020863 | Method and apparatus for providing a temporal storage appliance with block virtualization in storage networks | Dec 21, 2004 | Issued |
Array
(
[id] => 731232
[patent_doc_number] => 07047391
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[patent_issue_date] => 2006-05-16
[patent_title] => 'System and method for re-ordering memory references for access to memory'
[patent_app_type] => utility
[patent_app_number] => 11/019979
[patent_app_country] => US
[patent_app_date] => 2004-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/07/047/07047391.pdf
[firstpage_image] =>[orig_patent_app_number] => 11019979
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/019979 | System and method for re-ordering memory references for access to memory | Dec 20, 2004 | Issued |
Array
(
[id] => 877531
[patent_doc_number] => 07363454
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-22
[patent_title] => 'Storage pool space allocation across multiple locations'
[patent_app_type] => utility
[patent_app_number] => 11/009210
[patent_app_country] => US
[patent_app_date] => 2004-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/07/363/07363454.pdf
[firstpage_image] =>[orig_patent_app_number] => 11009210
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/009210 | Storage pool space allocation across multiple locations | Dec 9, 2004 | Issued |
Array
(
[id] => 5190642
[patent_doc_number] => 20070168951
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Java smart card chip having memory area reserved for global variables'
[patent_app_type] => utility
[patent_app_number] => 10/582118
[patent_app_country] => US
[patent_app_date] => 2004-12-03
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[firstpage_image] =>[orig_patent_app_number] => 10582118
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/582118 | Java smart card chip having memory area reserved for global variables | Dec 2, 2004 | Issued |
Array
(
[id] => 5717139
[patent_doc_number] => 20060080502
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[patent_issue_date] => 2006-04-13
[patent_title] => 'Storage apparatus'
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[patent_app_number] => 10/998780
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/998780 | Storage apparatus having virtual-to-actual device addressing scheme | Nov 29, 2004 | Issued |
Array
(
[id] => 873382
[patent_doc_number] => 07366820
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[patent_title] => 'Second-cache driving/controlling circuit, second cache, RAM, and second-cache driving/controlling method'
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Array
(
[id] => 885577
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[patent_title] => 'Snapshot system'
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Array
(
[id] => 5822042
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[patent_title] => 'Cache memory and method for controlling cache memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/998561 | Cache memory and method to maintain cache-coherence between cache memory units | Nov 29, 2004 | Issued |
Array
(
[id] => 929613
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Array
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Array
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Array
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Array
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