Search

John A. Mcpherson

Examiner (ID: 5128, Phone: (571)272-1386 , Office: P/1722 )

Most Active Art Unit
1756
Art Unit(s)
1795, 1724, 1721, 1752, 1737, 1756, 2899, 1506, 1113, 1722
Total Applications
2358
Issued Applications
1941
Pending Applications
51
Abandoned Applications
371

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20053871 [patent_doc_number] => 20250192093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICEs [patent_app_type] => utility [patent_app_number] => 19/057751 [patent_app_country] => US [patent_app_date] => 2025-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19057751 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/057751
SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICEs Feb 18, 2025 Pending
Array ( [id] => 20028958 [patent_doc_number] => 20250167180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK [patent_app_type] => utility [patent_app_number] => 19/033078 [patent_app_country] => US [patent_app_date] => 2025-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19033078 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/033078
INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK Jan 20, 2025 Pending
Array ( [id] => 20540600 [patent_doc_number] => 12557690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Package structures [patent_app_type] => utility [patent_app_number] => 19/025256 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 1119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19025256 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/025256
Package structures Jan 15, 2025 Issued
Array ( [id] => 19634598 [patent_doc_number] => 20240413047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE HAVING THERMAL MANAGEMENT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/779080 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779080 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779080
Semiconductor package structure having thermal management structure Jul 21, 2024 Issued
Array ( [id] => 19634599 [patent_doc_number] => 20240413048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE HAVING THERMAL MANAGEMENT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/779081 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779081 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779081
Semiconductor package structure having thermal management structure Jul 21, 2024 Issued
Array ( [id] => 19515925 [patent_doc_number] => 20240347611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => Source/Drain Feature to Contact Interfaces [patent_app_type] => utility [patent_app_number] => 18/750737 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750737 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/750737
Source/Drain Feature to Contact Interfaces Jun 20, 2024 Pending
Array ( [id] => 19790207 [patent_doc_number] => 20250063886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/735683 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735683
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME Jun 5, 2024 Pending
Array ( [id] => 20381900 [patent_doc_number] => 20250364393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/673204 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673204
SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME May 22, 2024 Pending
Array ( [id] => 19420955 [patent_doc_number] => 20240297079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SEMICONDUCTOR DEVICE HAVING PLANAR TRANSISTOR AND FINFET [patent_app_type] => utility [patent_app_number] => 18/662772 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662772
SEMICONDUCTOR DEVICE HAVING PLANAR TRANSISTOR AND FINFET May 12, 2024 Pending
Array ( [id] => 20291378 [patent_doc_number] => 20250316621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/660223 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660223 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660223
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF May 8, 2024 Pending
Array ( [id] => 20036337 [patent_doc_number] => 20250174559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/641525 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641525 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641525
SEMICONDUCTOR DEVICE Apr 21, 2024 Pending
Array ( [id] => 19531741 [patent_doc_number] => 20240355643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => SEMICONDUCTOR DEVICE WITH A PARTIAL SHIELDING LAYER AND A METHOD FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/639994 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639994 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/639994
SEMICONDUCTOR DEVICE WITH A PARTIAL SHIELDING LAYER AND A METHOD FOR MAKING THE SAME Apr 18, 2024 Pending
Array ( [id] => 19269521 [patent_doc_number] => 20240213225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => PACKAGE STACKING USING CHIP TO WAFER BONDING [patent_app_type] => utility [patent_app_number] => 18/601774 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601774 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601774
PACKAGE STACKING USING CHIP TO WAFER BONDING Mar 10, 2024 Pending
Array ( [id] => 19364371 [patent_doc_number] => 20240266405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES [patent_app_type] => utility [patent_app_number] => 18/591875 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591875 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591875
III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES Feb 28, 2024 Pending
Array ( [id] => 19239389 [patent_doc_number] => 20240196585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => Methods, Structures and Devices for Intra-Connection Structures [patent_app_type] => utility [patent_app_number] => 18/581604 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581604 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581604
Methods, Structures and Devices for Intra-Connection Structures Feb 19, 2024 Pending
Array ( [id] => 19221507 [patent_doc_number] => 20240186211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => DIRECT-COOLING FOR SEMICONDUCTOR DEVICE MODULES [patent_app_type] => utility [patent_app_number] => 18/441484 [patent_app_country] => US [patent_app_date] => 2024-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441484 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/441484
DIRECT-COOLING FOR SEMICONDUCTOR DEVICE MODULES Feb 13, 2024 Pending
Array ( [id] => 19392854 [patent_doc_number] => 20240282724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => ANTENNA-INTEGRATED HIGH-FREQUENCY SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/439938 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439938 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439938
ANTENNA-INTEGRATED HIGH-FREQUENCY SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SAME Feb 12, 2024 Pending
Array ( [id] => 19335624 [patent_doc_number] => 20240250054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => BARRIER FOR LIQUID METAL THERMAL INTERFACE MATERIAL IN AN ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/414292 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414292
BARRIER FOR LIQUID METAL THERMAL INTERFACE MATERIAL IN AN ELECTRONIC DEVICE Jan 15, 2024 Pending
Array ( [id] => 19161330 [patent_doc_number] => 20240154037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED EPITAXIAL SOURCE OR DRAIN STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/400772 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/400772
INTEGRATED CIRCUIT STRUCTURES HAVING DIELECTRIC ANCHOR AND CONFINED EPITAXIAL SOURCE OR DRAIN STRUCTURE Dec 28, 2023 Pending
Array ( [id] => 20013144 [patent_doc_number] => 20250151366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/531679 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531679 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531679
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Dec 5, 2023 Pending
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