
John A. Mcpherson
Examiner (ID: 5592, Phone: (571)272-1386 , Office: P/1722 )
| Most Active Art Unit | 1756 |
| Art Unit(s) | 1737, 1722, 1724, 1756, 1506, 1113, 1795, 1752, 2899, 1721 |
| Total Applications | 2358 |
| Issued Applications | 1941 |
| Pending Applications | 51 |
| Abandoned Applications | 371 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3534555
[patent_doc_number] => 05504702
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Dram cell'
[patent_app_type] => 1
[patent_app_number] => 8/266904
[patent_app_country] => US
[patent_app_date] => 1994-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2649
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/504/05504702.pdf
[firstpage_image] =>[orig_patent_app_number] => 266904
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/266904 | Dram cell | Jun 26, 1994 | Issued |
Array
(
[id] => 3124846
[patent_doc_number] => 05396461
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-07
[patent_title] => 'Non-volatile dynamic random access memory device'
[patent_app_type] => 1
[patent_app_number] => 8/264180
[patent_app_country] => US
[patent_app_date] => 1994-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 6622
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/396/05396461.pdf
[firstpage_image] =>[orig_patent_app_number] => 264180
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/264180 | Non-volatile dynamic random access memory device | Jun 21, 1994 | Issued |
| 08/262412 | GRAPHICS CONTROLLER INTEGRATED CIRCUIT WITHOUT MEMORY INTERFACE | Jun 19, 1994 | Abandoned |
Array
(
[id] => 3135619
[patent_doc_number] => 05436868
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-25
[patent_title] => 'Word line selection circuit for selecting memory cells'
[patent_app_type] => 1
[patent_app_number] => 8/258799
[patent_app_country] => US
[patent_app_date] => 1994-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 19
[patent_no_of_words] => 7044
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/436/05436868.pdf
[firstpage_image] =>[orig_patent_app_number] => 258799
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/258799 | Word line selection circuit for selecting memory cells | Jun 12, 1994 | Issued |
Array
(
[id] => 3118357
[patent_doc_number] => 05408431
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Single transistor EEPROM architecture'
[patent_app_type] => 1
[patent_app_number] => 8/258050
[patent_app_country] => US
[patent_app_date] => 1994-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4890
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/408/05408431.pdf
[firstpage_image] =>[orig_patent_app_number] => 258050
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/258050 | Single transistor EEPROM architecture | Jun 9, 1994 | Issued |
Array
(
[id] => 3458202
[patent_doc_number] => 05386392
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-31
[patent_title] => 'Programmable high speed array clock generator circuit for array built-in self test memory chips'
[patent_app_type] => 1
[patent_app_number] => 8/255697
[patent_app_country] => US
[patent_app_date] => 1994-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5705
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/386/05386392.pdf
[firstpage_image] =>[orig_patent_app_number] => 255697
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/255697 | Programmable high speed array clock generator circuit for array built-in self test memory chips | Jun 7, 1994 | Issued |
Array
(
[id] => 3455473
[patent_doc_number] => 05420812
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-30
[patent_title] => 'Bidirectional type CCD'
[patent_app_type] => 1
[patent_app_number] => 8/255268
[patent_app_country] => US
[patent_app_date] => 1994-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 4223
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/420/05420812.pdf
[firstpage_image] =>[orig_patent_app_number] => 255268
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/255268 | Bidirectional type CCD | Jun 6, 1994 | Issued |
Array
(
[id] => 3704978
[patent_doc_number] => 05619445
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-08
[patent_title] => 'Analog memory system having a frequency domain transform processor'
[patent_app_type] => 1
[patent_app_number] => 8/254818
[patent_app_country] => US
[patent_app_date] => 1994-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 42
[patent_no_of_words] => 54577
[patent_no_of_claims] => 64
[patent_no_of_ind_claims] => 50
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/619/05619445.pdf
[firstpage_image] =>[orig_patent_app_number] => 254818
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/254818 | Analog memory system having a frequency domain transform processor | Jun 5, 1994 | Issued |
Array
(
[id] => 3491581
[patent_doc_number] => 05406525
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-11
[patent_title] => 'Configurable SRAM and method for providing the same'
[patent_app_type] => 1
[patent_app_number] => 8/254848
[patent_app_country] => US
[patent_app_date] => 1994-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 9006
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/406/05406525.pdf
[firstpage_image] =>[orig_patent_app_number] => 254848
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/254848 | Configurable SRAM and method for providing the same | Jun 5, 1994 | Issued |
Array
(
[id] => 3451646
[patent_doc_number] => 05430688
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-04
[patent_title] => 'Synchronous dynamic random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/254878
[patent_app_country] => US
[patent_app_date] => 1994-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6019
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/430/05430688.pdf
[firstpage_image] =>[orig_patent_app_number] => 254878
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/254878 | Synchronous dynamic random access memory | Jun 5, 1994 | Issued |
Array
(
[id] => 3566901
[patent_doc_number] => 05502677
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-26
[patent_title] => 'Semiconductor memory device incorporating a test mode therein to perform an automatic refresh function'
[patent_app_type] => 1
[patent_app_number] => 8/253773
[patent_app_country] => US
[patent_app_date] => 1994-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 20
[patent_no_of_words] => 3446
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/502/05502677.pdf
[firstpage_image] =>[orig_patent_app_number] => 253773
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/253773 | Semiconductor memory device incorporating a test mode therein to perform an automatic refresh function | Jun 2, 1994 | Issued |
Array
(
[id] => 3118487
[patent_doc_number] => 05408438
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/251403
[patent_app_country] => US
[patent_app_date] => 1994-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4628
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/408/05408438.pdf
[firstpage_image] =>[orig_patent_app_number] => 251403
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/251403 | Semiconductor memory | May 30, 1994 | Issued |
Array
(
[id] => 3435647
[patent_doc_number] => 05416738
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-16
[patent_title] => 'Single transistor flash EPROM cell and method of operation'
[patent_app_type] => 1
[patent_app_number] => 8/250171
[patent_app_country] => US
[patent_app_date] => 1994-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 4577
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 349
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/416/05416738.pdf
[firstpage_image] =>[orig_patent_app_number] => 250171
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/250171 | Single transistor flash EPROM cell and method of operation | May 26, 1994 | Issued |
Array
(
[id] => 3451572
[patent_doc_number] => 05398208
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-14
[patent_title] => 'One-time PROM microcomputer'
[patent_app_type] => 1
[patent_app_number] => 8/246713
[patent_app_country] => US
[patent_app_date] => 1994-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3899
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/398/05398208.pdf
[firstpage_image] =>[orig_patent_app_number] => 246713
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/246713 | One-time PROM microcomputer | May 19, 1994 | Issued |
Array
(
[id] => 3597845
[patent_doc_number] => 05550782
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-27
[patent_title] => 'Programmable logic array integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/245509
[patent_app_country] => US
[patent_app_date] => 1994-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 31
[patent_no_of_words] => 14872
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/550/05550782.pdf
[firstpage_image] =>[orig_patent_app_number] => 245509
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/245509 | Programmable logic array integrated circuits | May 17, 1994 | Issued |
Array
(
[id] => 3122797
[patent_doc_number] => 05414658
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-09
[patent_title] => 'Electrically erasable programmable read-only memory array'
[patent_app_type] => 1
[patent_app_number] => 8/245189
[patent_app_country] => US
[patent_app_date] => 1994-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7230
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/414/05414658.pdf
[firstpage_image] =>[orig_patent_app_number] => 245189
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/245189 | Electrically erasable programmable read-only memory array | May 16, 1994 | Issued |
Array
(
[id] => 3492439
[patent_doc_number] => 05446684
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-29
[patent_title] => 'Storage medium, storage method and stored information reading method'
[patent_app_type] => 1
[patent_app_number] => 8/240473
[patent_app_country] => US
[patent_app_date] => 1994-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 28
[patent_no_of_words] => 8029
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/446/05446684.pdf
[firstpage_image] =>[orig_patent_app_number] => 240473
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/240473 | Storage medium, storage method and stored information reading method | May 9, 1994 | Issued |
Array
(
[id] => 3530302
[patent_doc_number] => 05490103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Signal terminal structure for macro cells and an associated connection method'
[patent_app_type] => 1
[patent_app_number] => 8/237726
[patent_app_country] => US
[patent_app_date] => 1994-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 48
[patent_no_of_words] => 9977
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/490/05490103.pdf
[firstpage_image] =>[orig_patent_app_number] => 237726
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/237726 | Signal terminal structure for macro cells and an associated connection method | May 3, 1994 | Issued |
Array
(
[id] => 3125597
[patent_doc_number] => 05410504
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Memory based on arrays of capacitors'
[patent_app_type] => 1
[patent_app_number] => 8/237269
[patent_app_country] => US
[patent_app_date] => 1994-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5257
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410504.pdf
[firstpage_image] =>[orig_patent_app_number] => 237269
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/237269 | Memory based on arrays of capacitors | May 2, 1994 | Issued |
Array
(
[id] => 3114109
[patent_doc_number] => 05448514
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'Ultra high density dimer memory device'
[patent_app_type] => 1
[patent_app_number] => 8/235508
[patent_app_country] => US
[patent_app_date] => 1994-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2444
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/448/05448514.pdf
[firstpage_image] =>[orig_patent_app_number] => 235508
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/235508 | Ultra high density dimer memory device | Apr 28, 1994 | Issued |