John A. Mcpherson

Array ( [id] => 2931583 [patent_doc_number] => 05235551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-10 [patent_title] => 'Memory addressing scheme' [patent_app_type] => 1 [patent_app_number] => 7/638688 [patent_app_country] => US [patent_app_date] => 1991-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6534 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/235/05235551.pdf [firstpage_image] =>[orig_patent_app_number] => 638688 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2861671 [patent_doc_number] => 05089986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'Mushroom double stacked capacitor' [patent_app_type] => 1 [patent_app_number] => 7/637108 [patent_app_country] => US [patent_app_date] => 1991-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 2571 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089986.pdf [firstpage_image] =>[orig_patent_app_number] => 637108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2679935 [patent_doc_number] => 05047985 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Static random access memory device having a high speed read-out and precharging arrangement' [patent_app_type] => 1 [patent_app_number] => 7/636578 [patent_app_country] => US [patent_app_date] => 1991-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 6784 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047985.pdf [firstpage_image] =>[orig_patent_app_number] => 636578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3055403 [patent_doc_number] => 05287304 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Memory cell circuit and array' [patent_app_type] => 1 [patent_app_number] => 7/636518 [patent_app_country] => US [patent_app_date] => 1990-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 9063 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287304.pdf [firstpage_image] =>[orig_patent_app_number] => 636518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2899368 [patent_doc_number] => 05239505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Floating gate non-volatile memory with blocks and memory refresh' [patent_app_type] => 1 [patent_app_number] => 7/635308 [patent_app_country] => US [patent_app_date] => 1990-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7027 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/239/05239505.pdf [firstpage_image] =>[orig_patent_app_number] => 635308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2785628 [patent_doc_number] => 05151879 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Sense amplifier with latch' [patent_app_type] => 1 [patent_app_number] => 7/634630 [patent_app_country] => US [patent_app_date] => 1990-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2893 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151879.pdf [firstpage_image] =>[orig_patent_app_number] => 634630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3032083 [patent_doc_number] => 05289402 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-22 [patent_title] => 'Recording medium, recording method, and readout method' [patent_app_type] => 1 [patent_app_number] => 7/634707 [patent_app_country] => US [patent_app_date] => 1990-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5284 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/289/05289402.pdf [firstpage_image] =>[orig_patent_app_number] => 634707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2790632 [patent_doc_number] => 05088060 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-11 [patent_title] => 'Electrically erasable programmable read-only memory with NAND memory cell structure' [patent_app_type] => 1 [patent_app_number] => 7/634325 [patent_app_country] => US [patent_app_date] => 1990-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6744 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/088/05088060.pdf [firstpage_image] =>[orig_patent_app_number] => 634325 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2817084 [patent_doc_number] => 05157630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'Semiconductor memory which can be prevented from shifting to undesired operation mode' [patent_app_type] => 1 [patent_app_number] => 7/629727 [patent_app_country] => US [patent_app_date] => 1990-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4202 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/157/05157630.pdf [firstpage_image] =>[orig_patent_app_number] => 629727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2928187 [patent_doc_number] => 05193072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Hidden refresh of a dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 7/631618 [patent_app_country] => US [patent_app_date] => 1990-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4811 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193072.pdf [firstpage_image] =>[orig_patent_app_number] => 631618 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2810269 [patent_doc_number] => 05140548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-18 [patent_title] => 'Ferroelectric space charge capacitor memory' [patent_app_type] => 1 [patent_app_number] => 7/630038 [patent_app_country] => US [patent_app_date] => 1990-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3110 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/140/05140548.pdf [firstpage_image] =>[orig_patent_app_number] => 630038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2785592 [patent_doc_number] => 05151877 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Ferroelectric space charge capacitor memory system' [patent_app_type] => 1 [patent_app_number] => 7/630027 [patent_app_country] => US [patent_app_date] => 1990-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4185 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151877.pdf [firstpage_image] =>[orig_patent_app_number] => 630027 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2905101 [patent_doc_number] => 05241499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Non-volatile split gate EPROM memory cell and self-aligned field insulation process for obtaining the above cell' [patent_app_type] => 1 [patent_app_number] => 7/631008 [patent_app_country] => US [patent_app_date] => 1990-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 33 [patent_no_of_words] => 2532 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/241/05241499.pdf [firstpage_image] =>[orig_patent_app_number] => 631008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2810409 [patent_doc_number] => 05140556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-18 [patent_title] => 'Semiconductor memory circuit having dummy cells connected to twisted bit lines' [patent_app_type] => 1 [patent_app_number] => 7/627324 [patent_app_country] => US [patent_app_date] => 1990-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3858 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/140/05140556.pdf [firstpage_image] =>[orig_patent_app_number] => 627324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2973441 [patent_doc_number] => 05274600 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'First-in first-out memory' [patent_app_type] => 1 [patent_app_number] => 7/626918 [patent_app_country] => US [patent_app_date] => 1990-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3201 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274600.pdf [firstpage_image] =>[orig_patent_app_number] => 626918 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2958106 [patent_doc_number] => 05222040 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-22 [patent_title] => 'Single transistor EEPROM memory cell' [patent_app_type] => 1 [patent_app_number] => 7/625807 [patent_app_country] => US [patent_app_date] => 1990-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3077 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/222/05222040.pdf [firstpage_image] =>[orig_patent_app_number] => 625807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3108045 [patent_doc_number] => 05319598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-07 [patent_title] => 'Nonvolatile serially programmable devices' [patent_app_type] => 1 [patent_app_number] => 7/624838 [patent_app_country] => US [patent_app_date] => 1990-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5019 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/319/05319598.pdf [firstpage_image] =>[orig_patent_app_number] => 624838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2889079 [patent_doc_number] => 05119333 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'SAM data accessing circuit having low operating current' [patent_app_type] => 1 [patent_app_number] => 7/622477 [patent_app_country] => US [patent_app_date] => 1990-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4157 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119333.pdf [firstpage_image] =>[orig_patent_app_number] => 622477 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2806814 [patent_doc_number] => 05144584 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/622067 [patent_app_country] => US [patent_app_date] => 1990-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4283 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/144/05144584.pdf [firstpage_image] =>[orig_patent_app_number] => 622067 [rel_patent_id] =>[rel_patent_doc_number] =>)