Search

John A. Ricci

Examiner (ID: 6979, Phone: (571)272-4429 , Office: P/3711 )

Most Active Art Unit
3711
Art Unit(s)
3712, 3714, 3501, 3711
Total Applications
4519
Issued Applications
3889
Pending Applications
142
Abandoned Applications
523

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10883111 [patent_doc_number] => 08907493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/762223 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 7675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762223 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/762223
Semiconductor device and method of manufacturing the same Feb 6, 2013 Issued
Array ( [id] => 10893364 [patent_doc_number] => 08916979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Through-vias and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 13/762248 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2891 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/762248
Through-vias and methods of forming the same Feb 6, 2013 Issued
Array ( [id] => 9639493 [patent_doc_number] => 20140217604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'Package Structure and Methods of Forming Same' [patent_app_type] => utility [patent_app_number] => 13/758665 [patent_app_country] => US [patent_app_date] => 2013-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5089 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13758665 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/758665
Package structure and methods of forming same Feb 3, 2013 Issued
Array ( [id] => 10883117 [patent_doc_number] => 08907500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Multi-die wirebond packages with elongated windows' [patent_app_type] => utility [patent_app_number] => 13/758412 [patent_app_country] => US [patent_app_date] => 2013-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 10054 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13758412 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/758412
Multi-die wirebond packages with elongated windows Feb 3, 2013 Issued
Array ( [id] => 9627173 [patent_doc_number] => 08796860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/752219 [patent_app_country] => US [patent_app_date] => 2013-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3834 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13752219 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/752219
Semiconductor device Jan 27, 2013 Issued
Array ( [id] => 8838971 [patent_doc_number] => 20130134599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'METHOD AND STRUCTURE OF INTEGRATED MICRO ELECTRO-MECHANICAL SYSTEMS AND ELECTRONIC DEVICES USING EDGE BOND PADS' [patent_app_type] => utility [patent_app_number] => 13/751014 [patent_app_country] => US [patent_app_date] => 2013-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5330 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13751014 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/751014
Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads Jan 24, 2013 Issued
Array ( [id] => 8818499 [patent_doc_number] => 20130119544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'MICROELECTRONIC PACKAGE AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/736209 [patent_app_country] => US [patent_app_date] => 2013-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4353 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13736209 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/736209
Microelectronic package and method of manufacturing same Jan 7, 2013 Issued
Array ( [id] => 10876952 [patent_doc_number] => 08901743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Fabrication of semiconductor device including chemical mechanical polishing' [patent_app_type] => utility [patent_app_number] => 13/736378 [patent_app_country] => US [patent_app_date] => 2013-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6532 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13736378 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/736378
Fabrication of semiconductor device including chemical mechanical polishing Jan 7, 2013 Issued
Array ( [id] => 9286842 [patent_doc_number] => 08643173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-04 [patent_title] => 'Cooling apparatuses and power electronics modules with single-phase and two-phase surface enhancement features' [patent_app_type] => utility [patent_app_number] => 13/734710 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4491 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734710 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734710
Cooling apparatuses and power electronics modules with single-phase and two-phase surface enhancement features Jan 3, 2013 Issued
Array ( [id] => 9324147 [patent_doc_number] => 08659173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-25 [patent_title] => 'Isolated wire structures with reduced stress, methods of manufacturing and design structures' [patent_app_type] => utility [patent_app_number] => 13/734130 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4281 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734130 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734130
Isolated wire structures with reduced stress, methods of manufacturing and design structures Jan 3, 2013 Issued
Array ( [id] => 9594723 [patent_doc_number] => 20140191400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'Semiconductor Devices and Methods of Manufacture Thereof' [patent_app_type] => utility [patent_app_number] => 13/734892 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3931 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734892
Semiconductor devices and methods of manufacture thereof Jan 3, 2013 Issued
Array ( [id] => 9323452 [patent_doc_number] => 08658472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/722231 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 4676 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13722231 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/722231
Semiconductor device Dec 19, 2012 Issued
Array ( [id] => 9239827 [patent_doc_number] => 08604621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Semiconductor device and information processing system including the same' [patent_app_type] => utility [patent_app_number] => 13/720265 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 12892 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720265 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/720265
Semiconductor device and information processing system including the same Dec 18, 2012 Issued
Array ( [id] => 8730342 [patent_doc_number] => 20130075911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'Semiconductor Device Having Electrode/Film Opening Edge Spacing Smaller Than Bonding Pad/Electrode Edge Spacing' [patent_app_type] => utility [patent_app_number] => 13/683271 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 20842 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13683271 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/683271
Semiconductor device having electrode/film opening edge spacing smaller than bonding pad/electrode edge spacing Nov 20, 2012 Issued
Array ( [id] => 8730284 [patent_doc_number] => 20130075853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'Stacked Die Package for MEMS Resonator System' [patent_app_type] => utility [patent_app_number] => 13/681065 [patent_app_country] => US [patent_app_date] => 2012-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13681065 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/681065
Stacked die package for MEMS resonator system Nov 18, 2012 Issued
Array ( [id] => 9418883 [patent_doc_number] => 20140103533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR WITH BACK GATE CONTACT' [patent_app_type] => utility [patent_app_number] => 13/678111 [patent_app_country] => US [patent_app_date] => 2012-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9553 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13678111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/678111
Extremely thin semiconductor-on-insulator with back gate contact Nov 14, 2012 Issued
Array ( [id] => 9530657 [patent_doc_number] => 08754534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/673990 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 45 [patent_no_of_words] => 17509 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673990 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/673990
Semiconductor device Nov 8, 2012 Issued
Array ( [id] => 10870926 [patent_doc_number] => 08896127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Via structure and via etching process of forming the same' [patent_app_type] => utility [patent_app_number] => 13/671711 [patent_app_country] => US [patent_app_date] => 2012-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671711 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/671711
Via structure and via etching process of forming the same Nov 7, 2012 Issued
Array ( [id] => 9274061 [patent_doc_number] => 08637995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate' [patent_app_type] => utility [patent_app_number] => 13/657327 [patent_app_country] => US [patent_app_date] => 2012-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 13221 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13657327 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/657327
Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate Oct 21, 2012 Issued
Array ( [id] => 8649206 [patent_doc_number] => 20130034937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'Exposed Die Package for Direct Surface Mounting' [patent_app_type] => utility [patent_app_number] => 13/646199 [patent_app_country] => US [patent_app_date] => 2012-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2658 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646199 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/646199
Exposed die package for direct surface mounting Oct 4, 2012 Issued
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