Search

John A. Ricci

Examiner (ID: 6979, Phone: (571)272-4429 , Office: P/3711 )

Most Active Art Unit
3711
Art Unit(s)
3712, 3714, 3501, 3711
Total Applications
4519
Issued Applications
3889
Pending Applications
142
Abandoned Applications
523

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9140903 [patent_doc_number] => 08581366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Method and system for forming conductive bumping with copper interconnection' [patent_app_type] => utility [patent_app_number] => 13/645448 [patent_app_country] => US [patent_app_date] => 2012-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5370 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13645448 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/645448
Method and system for forming conductive bumping with copper interconnection Oct 3, 2012 Issued
Array ( [id] => 8994863 [patent_doc_number] => 08518747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Stackable semiconductor assemblies and methods of manufacturing such assemblies' [patent_app_type] => utility [patent_app_number] => 13/619409 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5308 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619409 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/619409
Stackable semiconductor assemblies and methods of manufacturing such assemblies Sep 13, 2012 Issued
Array ( [id] => 9524790 [patent_doc_number] => 08749066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Semiconductor constructions' [patent_app_type] => utility [patent_app_number] => 13/615170 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 37 [patent_no_of_words] => 5923 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13615170 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/615170
Semiconductor constructions Sep 12, 2012 Issued
Array ( [id] => 8563747 [patent_doc_number] => 20120326318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'BURIED METAL-SEMICONDUCTOR ALLOY LAYERS AND STRUCTURES AND METHODS FOR FABRICATION THEREOF' [patent_app_type] => utility [patent_app_number] => 13/607869 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607869 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607869
Buried metal-semiconductor alloy layers and structures and methods for fabrication thereof Sep 9, 2012 Issued
Array ( [id] => 10832028 [patent_doc_number] => 08860202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Chip stack structure and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/597669 [patent_app_country] => US [patent_app_date] => 2012-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 3319 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13597669 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/597669
Chip stack structure and manufacturing method thereof Aug 28, 2012 Issued
Array ( [id] => 9335141 [patent_doc_number] => 20140061923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'STRUCTURE TO INCREASE RESISTANCE TO ELECTROMIGRATION' [patent_app_type] => utility [patent_app_number] => 13/598196 [patent_app_country] => US [patent_app_date] => 2012-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5935 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598196 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598196
Structure to increase resistance to electromigration Aug 28, 2012 Issued
Array ( [id] => 9582933 [patent_doc_number] => 08772935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/598156 [patent_app_country] => US [patent_app_date] => 2012-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4299 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598156
Semiconductor device and method of manufacturing the same Aug 28, 2012 Issued
Array ( [id] => 8680928 [patent_doc_number] => 20130049212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/596859 [patent_app_country] => US [patent_app_date] => 2012-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 8037 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13596859 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/596859
Semiconductor device Aug 27, 2012 Issued
Array ( [id] => 8851012 [patent_doc_number] => 20130140687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/596465 [patent_app_country] => US [patent_app_date] => 2012-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4776 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13596465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/596465
Semiconductor device Aug 27, 2012 Issued
Array ( [id] => 8705488 [patent_doc_number] => 20130062777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/592540 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11713 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592540 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/592540
Semiconductor integrated circuit device Aug 22, 2012 Issued
Array ( [id] => 10838603 [patent_doc_number] => 08866283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Chip package structure and method of making the same' [patent_app_type] => utility [patent_app_number] => 13/588254 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3855 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13588254 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/588254
Chip package structure and method of making the same Aug 16, 2012 Issued
Array ( [id] => 9060516 [patent_doc_number] => 08546955 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-01 [patent_title] => 'Multi-die stack package' [patent_app_type] => utility [patent_app_number] => 13/587716 [patent_app_country] => US [patent_app_date] => 2012-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13587716 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/587716
Multi-die stack package Aug 15, 2012 Issued
Array ( [id] => 8838978 [patent_doc_number] => 20130134606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'SEMICONDUCTOR PACKAGES' [patent_app_type] => utility [patent_app_number] => 13/587330 [patent_app_country] => US [patent_app_date] => 2012-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8460 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13587330 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/587330
Semiconductor packages Aug 15, 2012 Issued
Array ( [id] => 8995637 [patent_doc_number] => 08519524 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Chip stacking structure and fabricating method of the chip stacking structure' [patent_app_type] => utility [patent_app_number] => 13/586890 [patent_app_country] => US [patent_app_date] => 2012-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 3772 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13586890 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/586890
Chip stacking structure and fabricating method of the chip stacking structure Aug 15, 2012 Issued
Array ( [id] => 8509724 [patent_doc_number] => 20120309132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'CURVILINEAR HEAT SPREADER/LID WITH IMPROVED HEAT DISSIPATION' [patent_app_type] => utility [patent_app_number] => 13/586421 [patent_app_country] => US [patent_app_date] => 2012-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2299 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13586421 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/586421
Curvilinear heat spreader/lid with improved heat dissipation Aug 14, 2012 Issued
Array ( [id] => 9323449 [patent_doc_number] => 08658468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Method for fabricating a semiconductor and semiconductor package' [patent_app_type] => utility [patent_app_number] => 13/570986 [patent_app_country] => US [patent_app_date] => 2012-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 7179 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13570986 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/570986
Method for fabricating a semiconductor and semiconductor package Aug 8, 2012 Issued
Array ( [id] => 9575955 [patent_doc_number] => 08766372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Copper-filled trench contact for transistor performance improvement' [patent_app_type] => utility [patent_app_number] => 13/569150 [patent_app_country] => US [patent_app_date] => 2012-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 7103 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13569150 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/569150
Copper-filled trench contact for transistor performance improvement Aug 6, 2012 Issued
Array ( [id] => 9167285 [patent_doc_number] => 08592968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Semiconductor device, semiconductor package, interposer, semiconductor device manufacturing method and interposer manufacturing method' [patent_app_type] => utility [patent_app_number] => 13/563560 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 2862 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13563560 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/563560
Semiconductor device, semiconductor package, interposer, semiconductor device manufacturing method and interposer manufacturing method Jul 30, 2012 Issued
Array ( [id] => 8462631 [patent_doc_number] => 20120267799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'PACKAGE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/539775 [patent_app_country] => US [patent_app_date] => 2012-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539775 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/539775
Package structures Jul 1, 2012 Issued
Array ( [id] => 10864596 [patent_doc_number] => 08890302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Hybrid package transmission line circuits' [patent_app_type] => utility [patent_app_number] => 13/538887 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 6180 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538887 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538887
Hybrid package transmission line circuits Jun 28, 2012 Issued
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