Search

John A. Ricci

Examiner (ID: 6979, Phone: (571)272-4429 , Office: P/3711 )

Most Active Art Unit
3711
Art Unit(s)
3712, 3714, 3501, 3711
Total Applications
4519
Issued Applications
3889
Pending Applications
142
Abandoned Applications
523

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8742666 [patent_doc_number] => 20130082383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'ELECTRONIC ASSEMBLY HAVING MIXED INTERFACE INCLUDING TSV DIE' [patent_app_type] => utility [patent_app_number] => 13/251544 [patent_app_country] => US [patent_app_date] => 2011-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3343 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13251544 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/251544
ELECTRONIC ASSEMBLY HAVING MIXED INTERFACE INCLUDING TSV DIE Oct 2, 2011 Abandoned
Array ( [id] => 9254566 [patent_doc_number] => 08617982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Subtractive patterning to define circuit components' [patent_app_type] => utility [patent_app_number] => 13/251446 [patent_app_country] => US [patent_app_date] => 2011-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 8635 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13251446 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/251446
Subtractive patterning to define circuit components Oct 2, 2011 Issued
Array ( [id] => 8742659 [patent_doc_number] => 20130082376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => '3D INTEGRATED ELECTRONIC DEVICE STRUCTURE INCLUDING INCREASED THERMAL DISSIPATION CAPABILITIES' [patent_app_type] => utility [patent_app_number] => 13/249492 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5876 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13249492 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/249492
3D integrated electronic device structure including increased thermal dissipation capabilities Sep 29, 2011 Issued
Array ( [id] => 8299149 [patent_doc_number] => 20120181708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'SUBSTRATE FOR MOUNTING SEMICONDUCTOR, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/249838 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3459 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13249838 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/249838
Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device Sep 29, 2011 Issued
Array ( [id] => 8742661 [patent_doc_number] => 20130082377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'INTEGRATED THREE-DIMENSIONAL MODULE HEAT EXCHANGER FOR POWER ELECTRONICS COOLING' [patent_app_type] => utility [patent_app_number] => 13/249706 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13265 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13249706 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/249706
Integrated three-dimensional module heat exchanger for power electronics cooling Sep 29, 2011 Issued
Array ( [id] => 8742656 [patent_doc_number] => 20130082373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'LOW-INDUCTIVE SEMICONDUCTOR MODULE' [patent_app_type] => utility [patent_app_number] => 13/249427 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4422 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13249427 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/249427
Low-inductive semiconductor module Sep 29, 2011 Issued
Array ( [id] => 7738896 [patent_doc_number] => 20120018860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'METHOD FOR MANUFACTURING SUBSTRATE FOR SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/249702 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5116 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20120018860.pdf [firstpage_image] =>[orig_patent_app_number] => 13249702 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/249702
Method for manufacturing substrate for semiconductor element, and semiconductor device Sep 29, 2011 Issued
Array ( [id] => 8563746 [patent_doc_number] => 20120326317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/250153 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8708 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13250153 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/250153
Semiconductor device and manufacturing method therefor Sep 29, 2011 Issued
Array ( [id] => 8742670 [patent_doc_number] => 20130082387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'POWER SEMICONDUCTOR ARRANGEMENT AND METHOD FOR PRODUCING A POWER SEMICONDUCTOR ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 13/248464 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5018 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13248464 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/248464
Power semiconductor arrangement and method for producing a power semiconductor arrangement Sep 28, 2011 Issued
Array ( [id] => 8742662 [patent_doc_number] => 20130082379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'SEMICONDUCTOR PACKAGE INCLUDING AN INTEGRATED WAVEGUIDE' [patent_app_type] => utility [patent_app_number] => 13/248673 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 22725 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13248673 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/248673
Semiconductor package including an integrated waveguide Sep 28, 2011 Issued
Array ( [id] => 9100147 [patent_doc_number] => 08564026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Chip, method for producing a chip and device for laser ablation' [patent_app_type] => utility [patent_app_number] => 13/248087 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3657 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13248087 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/248087
Chip, method for producing a chip and device for laser ablation Sep 28, 2011 Issued
Array ( [id] => 9100241 [patent_doc_number] => 08564121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Semiconductor device and manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/241769 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 108 [patent_no_of_words] => 20351 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13241769 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/241769
Semiconductor device and manufacturing method of semiconductor device Sep 22, 2011 Issued
Array ( [id] => 8563735 [patent_doc_number] => 20120326305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/242462 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3930 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13242462 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/242462
Semiconductor package and fabrication method thereof Sep 22, 2011 Issued
Array ( [id] => 7720441 [patent_doc_number] => 20120009776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'SEMICONDUCTOR SUBSTRATES WITH UNITARY VIAS AND VIA TERMINALS, AND ASSOCIATED SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/241059 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5493 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20120009776.pdf [firstpage_image] =>[orig_patent_app_number] => 13241059 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/241059
Semiconductor substrates with unitary vias and via terminals, and associated systems and methods Sep 21, 2011 Issued
Array ( [id] => 7717013 [patent_doc_number] => 20120007110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'Light Emitting Device' [patent_app_type] => utility [patent_app_number] => 13/238322 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 21565 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007110.pdf [firstpage_image] =>[orig_patent_app_number] => 13238322 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/238322
Light emitting device Sep 20, 2011 Issued
Array ( [id] => 9504252 [patent_doc_number] => 08742570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Backplate interconnect with integrated passives' [patent_app_type] => utility [patent_app_number] => 13/229561 [patent_app_country] => US [patent_app_date] => 2011-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 14516 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13229561 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/229561
Backplate interconnect with integrated passives Sep 8, 2011 Issued
Array ( [id] => 9621394 [patent_doc_number] => 08791569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 13/214791 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3576 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214791 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214791
Semiconductor apparatus Aug 21, 2011 Issued
Array ( [id] => 8772995 [patent_doc_number] => 08426954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Methods of fabrication of package assemblies for optically interactive electronic devices and package assemblies therefor' [patent_app_type] => utility [patent_app_number] => 13/212579 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 5962 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212579 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212579
Methods of fabrication of package assemblies for optically interactive electronic devices and package assemblies therefor Aug 17, 2011 Issued
Array ( [id] => 9020973 [patent_doc_number] => 08530959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Three-dimensional semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/198234 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 73 [patent_no_of_words] => 12191 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198234 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198234
Three-dimensional semiconductor memory device Aug 3, 2011 Issued
Array ( [id] => 9350760 [patent_doc_number] => 08669654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-11 [patent_title] => 'Integrated circuit packaging system with die paddle and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/197070 [patent_app_country] => US [patent_app_date] => 2011-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 11412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13197070 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197070
Integrated circuit packaging system with die paddle and method of manufacture thereof Aug 2, 2011 Issued
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