John A. Rivell

Array ( [id] => 5675555 [patent_doc_number] => 20060180910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Three-dimensional circuit module and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/335254 [patent_app_country] => US [patent_app_date] => 2006-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8772 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20060180910.pdf [firstpage_image] =>[orig_patent_app_number] => 11335254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5217530 [patent_doc_number] => 20070158841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Structure of Ball Grid Array package' [patent_app_type] => utility [patent_app_number] => 11/330253 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2029 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20070158841.pdf [firstpage_image] =>[orig_patent_app_number] => 11330253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 377418 [patent_doc_number] => 07312519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Stacked integrated circuit package-in-package system' [patent_app_type] => utility [patent_app_number] => 11/331564 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5736 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/312/07312519.pdf [firstpage_image] =>[orig_patent_app_number] => 11331564 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 582007 [patent_doc_number] => 07456507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-25 [patent_title] => 'Die seal structure for reducing stress induced during die saw process' [patent_app_type] => utility [patent_app_number] => 11/330224 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1881 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/456/07456507.pdf [firstpage_image] =>[orig_patent_app_number] => 11330224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5863251 [patent_doc_number] => 20060097381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Chip package with grease heat sink' [patent_app_type] => utility [patent_app_number] => 11/312678 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4596 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20060097381.pdf [firstpage_image] =>[orig_patent_app_number] => 11312678 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5652717 [patent_doc_number] => 20060138452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Power semiconductor module' [patent_app_type] => utility [patent_app_number] => 11/304703 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4681 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138452.pdf [firstpage_image] =>[orig_patent_app_number] => 11304703 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4789504 [patent_doc_number] => 20080290477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 11/813034 [patent_app_country] => US [patent_app_date] => 2005-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14491 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290477.pdf [firstpage_image] =>[orig_patent_app_number] => 11813034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7590951 [patent_doc_number] => 07663216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'High density three dimensional semiconductor die package' [patent_app_type] => utility [patent_app_number] => 11/264889 [patent_app_country] => US [patent_app_date] => 2005-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4986 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663216.pdf [firstpage_image] =>[orig_patent_app_number] => 11264889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 356575 [patent_doc_number] => 07489013 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-02-10 [patent_title] => 'Destructor integrated circuit chip, interposer electronic device and methods' [patent_app_type] => utility [patent_app_number] => 11/252403 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1885 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/489/07489013.pdf [firstpage_image] =>[orig_patent_app_number] => 11252403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 844087 [patent_doc_number] => 07388284 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-06-17 [patent_title] => 'Integrated circuit package and method of attaching a lid to a substrate of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/250943 [patent_app_country] => US [patent_app_date] => 2005-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 3601 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/388/07388284.pdf [firstpage_image] =>[orig_patent_app_number] => 11250943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 893116 [patent_doc_number] => 07345369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-18 [patent_title] => 'Semiconductor device having semiconductor chip on base through solder layer and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/248263 [patent_app_country] => US [patent_app_date] => 2005-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 5121 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/345/07345369.pdf [firstpage_image] =>[orig_patent_app_number] => 11248263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 211474 [patent_doc_number] => 07622380 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-24 [patent_title] => 'Method of improving adhesion between two dielectric films' [patent_app_type] => utility [patent_app_number] => 11/245227 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4237 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622380.pdf [firstpage_image] =>[orig_patent_app_number] => 11245227 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 476712 [patent_doc_number] => 07227267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Semiconductor package using flip-chip mounting technique' [patent_app_type] => utility [patent_app_number] => 11/245413 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2722 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227267.pdf [firstpage_image] =>[orig_patent_app_number] => 11245413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 459623 [patent_doc_number] => 07237587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Multi-layer printed circuit board' [patent_app_type] => utility [patent_app_number] => 11/244333 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2319 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/237/07237587.pdf [firstpage_image] =>[orig_patent_app_number] => 11244333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5751078 [patent_doc_number] => 20060220227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'High density integrated circuit having multiple chips and employing a ball grid array (BGA) and method for making same' [patent_app_type] => utility [patent_app_number] => 11/243653 [patent_app_country] => US [patent_app_date] => 2005-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2632 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220227.pdf [firstpage_image] =>[orig_patent_app_number] => 11243653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 33689 [patent_doc_number] => 07791180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Physical quantity sensor and lead frame used for same' [patent_app_type] => utility [patent_app_number] => 11/571294 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 50 [patent_no_of_words] => 19119 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/791/07791180.pdf [firstpage_image] =>[orig_patent_app_number] => 11571294 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 795587 [patent_doc_number] => 07429501 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-30 [patent_title] => 'Lid and method of employing a lid on an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/242262 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 3017 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/429/07429501.pdf [firstpage_image] =>[orig_patent_app_number] => 11242262 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5718524 [patent_doc_number] => 20060071297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Device with integrated capacitance structure' [patent_app_type] => utility [patent_app_number] => 11/238114 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2779 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20060071297.pdf [firstpage_image] =>[orig_patent_app_number] => 11238114 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5838157 [patent_doc_number] => 20060118815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Power semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/235474 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3388 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20060118815.pdf [firstpage_image] =>[orig_patent_app_number] => 11235474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 896317 [patent_doc_number] => 07342299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-11 [patent_title] => 'Apparatus and methods for packaging antennas with integrated circuit chips for millimeter wave applications' [patent_app_type] => utility [patent_app_number] => 11/231919 [patent_app_country] => US [patent_app_date] => 2005-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6602 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/342/07342299.pdf [firstpage_image] =>[orig_patent_app_number] => 11231919 [rel_patent_id] =>[rel_patent_doc_number] =>)