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John B. Nguyen

Examiner (ID: 8226)

Most Active Art Unit
2819
Art Unit(s)
2819
Total Applications
427
Issued Applications
406
Pending Applications
12
Abandoned Applications
9

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1430395 [patent_doc_number] => 06504497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-07 [patent_title] => 'Hold-up-time extension circuits' [patent_app_type] => B2 [patent_app_number] => 09/855715 [patent_app_country] => US [patent_app_date] => 2001-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 3363 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504497.pdf [firstpage_image] =>[orig_patent_app_number] => 09855715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/855715
Hold-up-time extension circuits May 15, 2001 Issued
Array ( [id] => 6933629 [patent_doc_number] => 20010054973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-27 [patent_title] => 'Variable length decoder' [patent_app_type] => new [patent_app_number] => 09/842652 [patent_app_country] => US [patent_app_date] => 2001-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12261 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20010054973.pdf [firstpage_image] =>[orig_patent_app_number] => 09842652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/842652
Variable length decoder Apr 26, 2001 Issued
Array ( [id] => 1477177 [patent_doc_number] => 06388601 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Delay compensation for analog-to-digital converter in sigma-delta modulators' [patent_app_type] => B1 [patent_app_number] => 09/830150 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3010 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/388/06388601.pdf [firstpage_image] =>[orig_patent_app_number] => 09830150 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/830150
Delay compensation for analog-to-digital converter in sigma-delta modulators Apr 22, 2001 Issued
Array ( [id] => 6061112 [patent_doc_number] => 20020030615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'Method and system for making optimal estimates of linearity metrics of analog-to-digital converters' [patent_app_type] => new [patent_app_number] => 09/838359 [patent_app_country] => US [patent_app_date] => 2001-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5489 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20020030615.pdf [firstpage_image] =>[orig_patent_app_number] => 09838359 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/838359
Method and system for making optimal estimates of linearity metrics of analog-to-digital converters Apr 18, 2001 Issued
Array ( [id] => 1598743 [patent_doc_number] => 06492927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Digital-signal receiving apparatus' [patent_app_type] => B2 [patent_app_number] => 09/835456 [patent_app_country] => US [patent_app_date] => 2001-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3652 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492927.pdf [firstpage_image] =>[orig_patent_app_number] => 09835456 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/835456
Digital-signal receiving apparatus Apr 15, 2001 Issued
Array ( [id] => 1364083 [patent_doc_number] => 06577251 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Accessing sub-blocks of symbols from memory' [patent_app_type] => B1 [patent_app_number] => 09/824657 [patent_app_country] => US [patent_app_date] => 2001-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5463 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/577/06577251.pdf [firstpage_image] =>[orig_patent_app_number] => 09824657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/824657
Accessing sub-blocks of symbols from memory Apr 3, 2001 Issued
Array ( [id] => 1589005 [patent_doc_number] => 06359574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Method for identifying longest common substrings' [patent_app_type] => B1 [patent_app_number] => 09/821054 [patent_app_country] => US [patent_app_date] => 2001-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2694 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359574.pdf [firstpage_image] =>[orig_patent_app_number] => 09821054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/821054
Method for identifying longest common substrings Mar 29, 2001 Issued
Array ( [id] => 6895443 [patent_doc_number] => 20010026233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'A/D converter background calibration' [patent_app_type] => new [patent_app_number] => 09/808256 [patent_app_country] => US [patent_app_date] => 2001-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4143 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026233.pdf [firstpage_image] =>[orig_patent_app_number] => 09808256 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808256
A/D converter background calibration Mar 13, 2001 Issued
Array ( [id] => 6884193 [patent_doc_number] => 20010038351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Digitally switched impedance having improved linearity and settling time' [patent_app_type] => new [patent_app_number] => 09/804578 [patent_app_country] => US [patent_app_date] => 2001-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6225 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038351.pdf [firstpage_image] =>[orig_patent_app_number] => 09804578 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/804578
Digitally switched impedance having improved linearity and settling time Mar 11, 2001 Issued
Array ( [id] => 1437154 [patent_doc_number] => 06356219 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Calibrated encoder multiplier' [patent_app_type] => B1 [patent_app_number] => 09/799157 [patent_app_country] => US [patent_app_date] => 2001-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2349 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356219.pdf [firstpage_image] =>[orig_patent_app_number] => 09799157 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/799157
Calibrated encoder multiplier Mar 4, 2001 Issued
Array ( [id] => 6879336 [patent_doc_number] => 20010030621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'delta sigma Type A/D converter' [patent_app_type] => new [patent_app_number] => 09/785552 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2506 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20010030621.pdf [firstpage_image] =>[orig_patent_app_number] => 09785552 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785552
type A/D converter Feb 19, 2001 Issued
Array ( [id] => 6893616 [patent_doc_number] => 20010015982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Data transmission method and arrangement' [patent_app_type] => new [patent_app_number] => 09/784250 [patent_app_country] => US [patent_app_date] => 2001-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3759 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20010015982.pdf [firstpage_image] =>[orig_patent_app_number] => 09784250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/784250
Data transmission method and arrangement Feb 14, 2001 Issued
Array ( [id] => 1424223 [patent_doc_number] => 06522277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-18 [patent_title] => 'Circuit, system and method for performing dynamic element matching using bi-directional rotation within a data converter' [patent_app_type] => B2 [patent_app_number] => 09/778049 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/522/06522277.pdf [firstpage_image] =>[orig_patent_app_number] => 09778049 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/778049
Circuit, system and method for performing dynamic element matching using bi-directional rotation within a data converter Feb 4, 2001 Issued
Array ( [id] => 1598285 [patent_doc_number] => 06384759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method and apparatus for sample rate pre-and post-processing to achieve maximal coding gain for transform-based audio encoding and decoding' [patent_app_type] => B2 [patent_app_number] => 09/773492 [patent_app_country] => US [patent_app_date] => 2001-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3560 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384759.pdf [firstpage_image] =>[orig_patent_app_number] => 09773492 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773492
Method and apparatus for sample rate pre-and post-processing to achieve maximal coding gain for transform-based audio encoding and decoding Feb 1, 2001 Issued
Array ( [id] => 6899726 [patent_doc_number] => 20010009402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-26 [patent_title] => 'System for quantizing an analog signal utilizing a resonant tunneling diode differential ternary quantizer' [patent_app_type] => new [patent_app_number] => 09/776097 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2377 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20010009402.pdf [firstpage_image] =>[orig_patent_app_number] => 09776097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776097
System for quantizing an analog signal utilizing a resonant tunneling diode differential ternary quantizer Jan 31, 2001 Issued
Array ( [id] => 6562669 [patent_doc_number] => 20020138805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Low weight data encoding for minimal power delivery impact' [patent_app_type] => new [patent_app_number] => 09/759245 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20020138805.pdf [firstpage_image] =>[orig_patent_app_number] => 09759245 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/759245
Low weight data encoding for minimal power delivery impact Jan 15, 2001 Issued
Array ( [id] => 6877968 [patent_doc_number] => 20010002123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-31 [patent_title] => 'Sampling device having an intrinsic filter' [patent_app_type] => new-utility [patent_app_number] => 09/756353 [patent_app_country] => US [patent_app_date] => 2001-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4707 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002123.pdf [firstpage_image] =>[orig_patent_app_number] => 09756353 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/756353
Sampling device having an intrinsic filter Jan 7, 2001 Issued
Array ( [id] => 1535448 [patent_doc_number] => 06411230 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Circuit arrangement for parallel/serial conversion' [patent_app_type] => B1 [patent_app_number] => 09/719735 [patent_app_country] => US [patent_app_date] => 2000-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3005 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/411/06411230.pdf [firstpage_image] =>[orig_patent_app_number] => 09719735 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/719735
Circuit arrangement for parallel/serial conversion Dec 13, 2000 Issued
Array ( [id] => 1562963 [patent_doc_number] => 06437716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-20 [patent_title] => 'Gray scale display reference voltage generating circuit capable of changing gamma correction characteristic and LCD drive unit employing the same' [patent_app_type] => B2 [patent_app_number] => 09/731736 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7493 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437716.pdf [firstpage_image] =>[orig_patent_app_number] => 09731736 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731736
Gray scale display reference voltage generating circuit capable of changing gamma correction characteristic and LCD drive unit employing the same Dec 7, 2000 Issued
Array ( [id] => 7639489 [patent_doc_number] => 06396427 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Circuit arrangement for measuring the deceleration of a vehicle, caused by a pre-crash braking procedure' [patent_app_type] => B1 [patent_app_number] => 09/701350 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1633 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396427.pdf [firstpage_image] =>[orig_patent_app_number] => 09701350 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/701350
Circuit arrangement for measuring the deceleration of a vehicle, caused by a pre-crash braking procedure Nov 27, 2000 Issued
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