John B. Nguyen

Array ( [id] => 1479357 [patent_doc_number] => 06344814 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Driving circuit' [patent_app_type] => B1 [patent_app_number] => 09/458022 [patent_app_country] => US [patent_app_date] => 1999-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6717 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344814.pdf [firstpage_image] =>[orig_patent_app_number] => 09458022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4282008 [patent_doc_number] => 06323795 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Electronic digital-to-analog converter circuit for a baseband transmission system' [patent_app_type] => 1 [patent_app_number] => 9/457693 [patent_app_country] => US [patent_app_date] => 1999-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3056 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323795.pdf [firstpage_image] =>[orig_patent_app_number] => 457693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4379854 [patent_doc_number] => 06288654 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Data conversion apparatus, data conversion method, and recording medium' [patent_app_type] => 1 [patent_app_number] => 9/455696 [patent_app_country] => US [patent_app_date] => 1999-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 34 [patent_no_of_words] => 14996 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288654.pdf [firstpage_image] =>[orig_patent_app_number] => 455696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4416901 [patent_doc_number] => 06265998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Sampling device having an intrinsic filter' [patent_app_type] => 1 [patent_app_number] => 9/451044 [patent_app_country] => US [patent_app_date] => 1999-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4806 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265998.pdf [firstpage_image] =>[orig_patent_app_number] => 451044 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4359324 [patent_doc_number] => 06215421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Coding apparatus and method, decoding apparatus and method, data processing system, and storage medium' [patent_app_type] => 1 [patent_app_number] => 9/448543 [patent_app_country] => US [patent_app_date] => 1999-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 10482 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215421.pdf [firstpage_image] =>[orig_patent_app_number] => 448543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4427350 [patent_doc_number] => 06226773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Memory-minimized architecture for implementing map decoding' [patent_app_type] => 1 [patent_app_number] => 9/421567 [patent_app_country] => US [patent_app_date] => 1999-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1881 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226773.pdf [firstpage_image] =>[orig_patent_app_number] => 421567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4337940 [patent_doc_number] => 06320528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Built-in self test for integrated digital-to-analog converters' [patent_app_type] => 1 [patent_app_number] => 9/419465 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3807 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320528.pdf [firstpage_image] =>[orig_patent_app_number] => 419465 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4415873 [patent_doc_number] => 06310572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Semiconductor integrated circuit having plural input control circuits' [patent_app_type] => 1 [patent_app_number] => 9/419067 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6637 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310572.pdf [firstpage_image] =>[orig_patent_app_number] => 419067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1566897 [patent_doc_number] => 06339386 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Variable length coder of a video coder' [patent_app_type] => B1 [patent_app_number] => 09/418573 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2830 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339386.pdf [firstpage_image] =>[orig_patent_app_number] => 09418573 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7619466 [patent_doc_number] => 06943721 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-13 [patent_title] => 'Charge-coupled amplifier and converter with matched offsets' [patent_app_type] => utility [patent_app_number] => 09/333849 [patent_app_country] => US [patent_app_date] => 1999-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3015 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/943/06943721.pdf [firstpage_image] =>[orig_patent_app_number] => 09333849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1453206 [patent_doc_number] => 06456213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Digitizing readback waveform for testing hard disc drives' [patent_app_type] => B1 [patent_app_number] => 09/330649 [patent_app_country] => US [patent_app_date] => 1999-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3972 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/456/06456213.pdf [firstpage_image] =>[orig_patent_app_number] => 09330649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1462658 [patent_doc_number] => 06392580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Analog to digital converter having digital signal processing with a negative logic supply rail' [patent_app_type] => B1 [patent_app_number] => 09/330069 [patent_app_country] => US [patent_app_date] => 1999-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2159 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/392/06392580.pdf [firstpage_image] =>[orig_patent_app_number] => 09330069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4354604 [patent_doc_number] => 06285311 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Switched capacitor filter circuit having reduced offsets and allowing for offset compensation without a closed feedback loop' [patent_app_type] => 1 [patent_app_number] => 9/294755 [patent_app_country] => US [patent_app_date] => 1999-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/285/06285311.pdf [firstpage_image] =>[orig_patent_app_number] => 294755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4313993 [patent_doc_number] => 06252536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Dynamic range extender apparatus, system, and method for digital image receiver system' [patent_app_type] => 1 [patent_app_number] => 9/283779 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6867 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252536.pdf [firstpage_image] =>[orig_patent_app_number] => 283779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4417207 [patent_doc_number] => 06229462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Method and apparatus for reducing the disparity of set and clear bits on a serial line' [patent_app_type] => 1 [patent_app_number] => 9/283023 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3272 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229462.pdf [firstpage_image] =>[orig_patent_app_number] => 283023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4247689 [patent_doc_number] => 06166669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Protection from inbound signal noise caused by inductively coupled outbound signal transitions by controlling decision threshold' [patent_app_type] => 1 [patent_app_number] => 9/280674 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1655 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166669.pdf [firstpage_image] =>[orig_patent_app_number] => 280674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4366499 [patent_doc_number] => 06169507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Stabilization of single loop sigma-delta modulators of a high order' [patent_app_type] => 1 [patent_app_number] => 9/277874 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1651 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169507.pdf [firstpage_image] =>[orig_patent_app_number] => 277874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4414344 [patent_doc_number] => 06172623 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Efficient bit scan mechanism' [patent_app_type] => 1 [patent_app_number] => 9/274275 [patent_app_country] => US [patent_app_date] => 1999-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4987 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172623.pdf [firstpage_image] =>[orig_patent_app_number] => 274275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4413105 [patent_doc_number] => 06271774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Picture data processor, picture data decoder and picture data encoder, and methods thereof' [patent_app_type] => 1 [patent_app_number] => 9/274097 [patent_app_country] => US [patent_app_date] => 1999-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 7667 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271774.pdf [firstpage_image] =>[orig_patent_app_number] => 274097 [rel_patent_id] =>[rel_patent_doc_number] =>)