
John B. Nguyen
Examiner (ID: 17709)
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2819 |
| Total Applications | 427 |
| Issued Applications | 406 |
| Pending Applications | 12 |
| Abandoned Applications | 9 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 669440
[patent_doc_number] => 07095346
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-22
[patent_title] => 'A/D converter with minimized transfer error'
[patent_app_type] => utility
[patent_app_number] => 10/973656
[patent_app_country] => US
[patent_app_date] => 2004-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5546
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/095/07095346.pdf
[firstpage_image] =>[orig_patent_app_number] => 10973656
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/973656 | A/D converter with minimized transfer error | Oct 25, 2004 | Issued |
Array
(
[id] => 7155754
[patent_doc_number] => 20050083219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Digital-to-analog converter having error correction'
[patent_app_type] => utility
[patent_app_number] => 10/972947
[patent_app_country] => US
[patent_app_date] => 2004-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4414
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0083/20050083219.pdf
[firstpage_image] =>[orig_patent_app_number] => 10972947
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/972947 | Digital-to-analog converter having error correction | Oct 24, 2004 | Issued |
Array
(
[id] => 703861
[patent_doc_number] => 07064685
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-20
[patent_title] => 'Data converter with reduced component count for padded-protocol interface'
[patent_app_type] => utility
[patent_app_number] => 10/969448
[patent_app_country] => US
[patent_app_date] => 2004-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4425
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/064/07064685.pdf
[firstpage_image] =>[orig_patent_app_number] => 10969448
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/969448 | Data converter with reduced component count for padded-protocol interface | Oct 19, 2004 | Issued |
Array
(
[id] => 7621897
[patent_doc_number] => 06977604
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-20
[patent_title] => 'Analog-to-digital converter cyclically repeating AD conversion'
[patent_app_type] => utility
[patent_app_number] => 10/950569
[patent_app_country] => US
[patent_app_date] => 2004-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6288
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/977/06977604.pdf
[firstpage_image] =>[orig_patent_app_number] => 10950569
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/950569 | Analog-to-digital converter cyclically repeating AD conversion | Sep 27, 2004 | Issued |
Array
(
[id] => 6929530
[patent_doc_number] => 20050280564
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-22
[patent_title] => 'Digital sampling rate converter for compensating for drop of in-band signal'
[patent_app_type] => utility
[patent_app_number] => 10/951249
[patent_app_country] => US
[patent_app_date] => 2004-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5086
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0280/20050280564.pdf
[firstpage_image] =>[orig_patent_app_number] => 10951249
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/951249 | Digital sampling rate converter for compensation for drop of in-band signal | Sep 26, 2004 | Issued |
Array
(
[id] => 982876
[patent_doc_number] => 06927720
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-09
[patent_title] => 'Analog signal outputting circuit and multi-level delta-sigma modulator employing the analog signal outputting circuit'
[patent_app_type] => utility
[patent_app_number] => 10/948654
[patent_app_country] => US
[patent_app_date] => 2004-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6039
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/927/06927720.pdf
[firstpage_image] =>[orig_patent_app_number] => 10948654
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/948654 | Analog signal outputting circuit and multi-level delta-sigma modulator employing the analog signal outputting circuit | Sep 23, 2004 | Issued |
Array
(
[id] => 786109
[patent_doc_number] => 06989778
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-24
[patent_title] => 'Semi-conductor circuit arrangement'
[patent_app_type] => utility
[patent_app_number] => 10/938741
[patent_app_country] => US
[patent_app_date] => 2004-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3121
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/989/06989778.pdf
[firstpage_image] =>[orig_patent_app_number] => 10938741
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/938741 | Semi-conductor circuit arrangement | Sep 9, 2004 | Issued |
Array
(
[id] => 7008916
[patent_doc_number] => 20050062632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'System and method to substantially eliminate glitch in a digital to analog converter'
[patent_app_type] => utility
[patent_app_number] => 10/928373
[patent_app_country] => US
[patent_app_date] => 2004-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2265
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20050062632.pdf
[firstpage_image] =>[orig_patent_app_number] => 10928373
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/928373 | System and method to substantially eliminate glitch in a digital to analog converter | Aug 29, 2004 | Issued |
Array
(
[id] => 7114904
[patent_doc_number] => 20050068205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-31
[patent_title] => 'Method and apparatus for coding information, method and apparatus for decoding coded information, methodd of fabricating a recording medium, the recording medium and modulated signal'
[patent_app_type] => utility
[patent_app_number] => 10/902920
[patent_app_country] => US
[patent_app_date] => 2004-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 5858
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0068/20050068205.pdf
[firstpage_image] =>[orig_patent_app_number] => 10902920
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/902920 | Method and apparatus for coding information, method and apparatus for decoding coded information, method of fabricating a recording medium, the recording medium and modulated signal | Aug 1, 2004 | Issued |
Array
(
[id] => 946996
[patent_doc_number] => 06965330
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-11-15
[patent_title] => 'System and method for improved quality signal re-sampling using a weighted signal average'
[patent_app_type] => utility
[patent_app_number] => 10/897346
[patent_app_country] => US
[patent_app_date] => 2004-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 6835
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/965/06965330.pdf
[firstpage_image] =>[orig_patent_app_number] => 10897346
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/897346 | System and method for improved quality signal re-sampling using a weighted signal average | Jul 21, 2004 | Issued |
Array
(
[id] => 6970180
[patent_doc_number] => 20050035890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-17
[patent_title] => 'Method and circuit for producing trimmed voltage using D/A converter circuit'
[patent_app_type] => utility
[patent_app_number] => 10/896341
[patent_app_country] => US
[patent_app_date] => 2004-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5004
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20050035890.pdf
[firstpage_image] =>[orig_patent_app_number] => 10896341
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/896341 | Method and circuit for producing trimmed voltage using D/A converter circuit | Jul 20, 2004 | Issued |
Array
(
[id] => 935912
[patent_doc_number] => 06975262
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-13
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/878250
[patent_app_country] => US
[patent_app_date] => 2004-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 9780
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/975/06975262.pdf
[firstpage_image] =>[orig_patent_app_number] => 10878250
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/878250 | Semiconductor integrated circuit | Jun 28, 2004 | Issued |
Array
(
[id] => 7609173
[patent_doc_number] => 06999016
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-14
[patent_title] => 'D/A converter and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/864349
[patent_app_country] => US
[patent_app_date] => 2004-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4199
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/999/06999016.pdf
[firstpage_image] =>[orig_patent_app_number] => 10864349
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/864349 | D/A converter and semiconductor device | Jun 9, 2004 | Issued |
Array
(
[id] => 7324290
[patent_doc_number] => 20040252041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Shuffler apparatus and related dynamic element matching technique for linearization of unit-element digital-to-analog converters'
[patent_app_type] => new
[patent_app_number] => 10/847459
[patent_app_country] => US
[patent_app_date] => 2004-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5778
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0252/20040252041.pdf
[firstpage_image] =>[orig_patent_app_number] => 10847459
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/847459 | Shuffler apparatus and related dynamic element matching technique for linearization of unit-element digital-to-analog converters | May 17, 2004 | Issued |
Array
(
[id] => 791073
[patent_doc_number] => 06985098
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Analog front end circuit and method of compensating for DC offset in the analog front end circuit'
[patent_app_type] => utility
[patent_app_number] => 10/844750
[patent_app_country] => US
[patent_app_date] => 2004-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6590
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/985/06985098.pdf
[firstpage_image] =>[orig_patent_app_number] => 10844750
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/844750 | Analog front end circuit and method of compensating for DC offset in the analog front end circuit | May 12, 2004 | Issued |
Array
(
[id] => 770985
[patent_doc_number] => 07006028
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-28
[patent_title] => 'Digital background cancellation of digital to analog converter mismatch noise in analog to digital converters'
[patent_app_type] => utility
[patent_app_number] => 10/844047
[patent_app_country] => US
[patent_app_date] => 2004-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 23
[patent_no_of_words] => 11293
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/006/07006028.pdf
[firstpage_image] =>[orig_patent_app_number] => 10844047
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/844047 | Digital background cancellation of digital to analog converter mismatch noise in analog to digital converters | May 10, 2004 | Issued |
Array
(
[id] => 7609312
[patent_doc_number] => 06998877
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-14
[patent_title] => 'High speed differential signaling logic gate and applications thereof'
[patent_app_type] => utility
[patent_app_number] => 10/842608
[patent_app_country] => US
[patent_app_date] => 2004-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 5992
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 390
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/998/06998877.pdf
[firstpage_image] =>[orig_patent_app_number] => 10842608
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/842608 | High speed differential signaling logic gate and applications thereof | May 9, 2004 | Issued |
Array
(
[id] => 7252338
[patent_doc_number] => 20040239424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-02
[patent_title] => 'Temperature compensated amplifier'
[patent_app_type] => new
[patent_app_number] => 10/836677
[patent_app_country] => US
[patent_app_date] => 2004-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3561
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 323
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0239/20040239424.pdf
[firstpage_image] =>[orig_patent_app_number] => 10836677
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/836677 | Temperature compensated amplifier | Apr 29, 2004 | Issued |
Array
(
[id] => 954240
[patent_doc_number] => 06958655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-25
[patent_title] => 'Variable gain amplifier circuit using variable impedance circuit'
[patent_app_type] => utility
[patent_app_number] => 10/833027
[patent_app_country] => US
[patent_app_date] => 2004-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2441
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/958/06958655.pdf
[firstpage_image] =>[orig_patent_app_number] => 10833027
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/833027 | Variable gain amplifier circuit using variable impedance circuit | Apr 27, 2004 | Issued |
Array
(
[id] => 730949
[patent_doc_number] => 07042285
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-09
[patent_title] => 'RF power amplifier with load insensitive indirect forward power detector'
[patent_app_type] => utility
[patent_app_number] => 10/832791
[patent_app_country] => US
[patent_app_date] => 2004-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2668
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/042/07042285.pdf
[firstpage_image] =>[orig_patent_app_number] => 10832791
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/832791 | RF power amplifier with load insensitive indirect forward power detector | Apr 25, 2004 | Issued |