Search

John B. Roche

Examiner (ID: 9454, Phone: (571)270-1721 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
791
Issued Applications
582
Pending Applications
47
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16729737 [patent_doc_number] => 20210096884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => ON-DEMAND INDEXING OF DATA IN INPUT PATH OF OBJECT STORAGE SERVICE [patent_app_type] => utility [patent_app_number] => 16/586818 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586818 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586818
On-demand indexing of data in input path of object storage service Sep 26, 2019 Issued
Array ( [id] => 15714751 [patent_doc_number] => 20200104142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING CIRCUIT, INFORMATION PROCESSING SYSTEM, AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/583876 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583876
Information processing apparatus, information processing circuit, information processing system, and information processing method Sep 25, 2019 Issued
Array ( [id] => 15412695 [patent_doc_number] => 20200026670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => INFORMATION PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 16/584487 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8448 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584487 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/584487
Information processing device Sep 25, 2019 Issued
Array ( [id] => 16722333 [patent_doc_number] => 20210089480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => Providing Interrupts from an Input-Output Memory Management Unit to Guest Operating Systems [patent_app_type] => utility [patent_app_number] => 16/578165 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578165 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/578165
Providing interrupts from an input-output memory management unit to guest operating systems Sep 19, 2019 Issued
Array ( [id] => 15654779 [patent_doc_number] => 20200089920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => ELECTRONIC DEVICE AND METHOD FOR CONTROLLING CONNECTION OF EXTERNAL DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/572760 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572760 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572760
Electronic device and method for controlling connection of external device using the same Sep 16, 2019 Issued
Array ( [id] => 15594531 [patent_doc_number] => 20200073800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => APPROACH AND MECHANISM FOR CALCULATING AND CONFIGURING MEMORY MAPPING OF TREND LOG OBJECTS IN A SYSTEM [patent_app_type] => utility [patent_app_number] => 16/551217 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2893 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16551217 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/551217
Approach and mechanism for calculating and configuring memory mapping of trend log objects in a system Aug 25, 2019 Issued
Array ( [id] => 15919697 [patent_doc_number] => 10657088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Integrated circuit, bus system and control method thereof [patent_app_type] => utility [patent_app_number] => 16/547995 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4579 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547995 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547995
Integrated circuit, bus system and control method thereof Aug 21, 2019 Issued
Array ( [id] => 16802031 [patent_doc_number] => 10996975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Hierarchical memory systems [patent_app_type] => utility [patent_app_number] => 16/548286 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 12764 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/548286
Hierarchical memory systems Aug 21, 2019 Issued
Array ( [id] => 16338138 [patent_doc_number] => 10789094 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-29 [patent_title] => Hierarchical memory apparatus [patent_app_type] => utility [patent_app_number] => 16/547677 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547677 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547677
Hierarchical memory apparatus Aug 21, 2019 Issued
Array ( [id] => 15561723 [patent_doc_number] => 20200065273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => UBM IMPLEMENTATION INSIDE BMC [patent_app_type] => utility [patent_app_number] => 16/547225 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547225 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547225
UBM implementation inside BMC Aug 20, 2019 Issued
Array ( [id] => 15903217 [patent_doc_number] => 20200151128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => STORAGE SYSTEM, DATA MANAGEMENT METHOD, AND DATA MANAGEMENT PROGRAM [patent_app_type] => utility [patent_app_number] => 16/546356 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546356
Storage system, data management method, and data management program Aug 20, 2019 Issued
Array ( [id] => 15459295 [patent_doc_number] => 20200042472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => SOURCE SYNCHRONIZED SIGNALING MECHANISM [patent_app_type] => utility [patent_app_number] => 16/540477 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540477
Source synchronized signaling mechanism Aug 13, 2019 Issued
Array ( [id] => 16788114 [patent_doc_number] => 10990547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Dynamically reconfigurable networking using a programmable integrated circuit [patent_app_type] => utility [patent_app_number] => 16/537605 [patent_app_country] => US [patent_app_date] => 2019-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16953 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537605
Dynamically reconfigurable networking using a programmable integrated circuit Aug 10, 2019 Issued
Array ( [id] => 15500739 [patent_doc_number] => 20200050558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => Modifying NVMe Physical Region Page List Pointers and Data Pointers to Facilitate Routing of PCIe Memory Requests [patent_app_type] => utility [patent_app_number] => 16/532186 [patent_app_country] => US [patent_app_date] => 2019-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532186 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/532186
Modifying NVMe physical region page list pointers and data pointers to facilitate routing of PCIe memory requests Aug 4, 2019 Issued
Array ( [id] => 16615903 [patent_doc_number] => 20210034556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => SYSTEM AND METHOD FOR REGULATING HOST IOs AND INTERNAL BACKGROUND OPERATIONS IN A STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/530761 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530761
System and method for regulating host IOs and internal background operations in a storage system Aug 1, 2019 Issued
Array ( [id] => 17802123 [patent_doc_number] => 11416424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Expander I/O module discovery and management system [patent_app_type] => utility [patent_app_number] => 16/526624 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526624 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/526624
Expander I/O module discovery and management system Jul 29, 2019 Issued
Array ( [id] => 17817337 [patent_doc_number] => 11422950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Computing and communication module [patent_app_type] => utility [patent_app_number] => 16/508528 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508528
Computing and communication module Jul 10, 2019 Issued
Array ( [id] => 17715400 [patent_doc_number] => 11379391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Real-time automation device having a real-time data bus [patent_app_type] => utility [patent_app_number] => 17/268114 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 17558 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17268114 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/268114
Real-time automation device having a real-time data bus Jul 9, 2019 Issued
Array ( [id] => 15412713 [patent_doc_number] => 20200026679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => TRANSACTION ROUTING FOR SYSTEM ON CHIP [patent_app_type] => utility [patent_app_number] => 16/504794 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504794 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/504794
Transaction routing for system on chip Jul 7, 2019 Issued
Array ( [id] => 18218641 [patent_doc_number] => 11593583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Method and system to implement cluster failure prediction to facilitate split brain resolution [patent_app_type] => utility [patent_app_number] => 16/457445 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9874 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/457445
Method and system to implement cluster failure prediction to facilitate split brain resolution Jun 27, 2019 Issued
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