John B. Roche

Array ( [id] => 14935361 [patent_doc_number] => 20190303318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => CONFIGURABLE INTERFACE CARD [patent_app_type] => utility [patent_app_number] => 16/264320 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7259 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15887157 [patent_doc_number] => 10649923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-12 [patent_title] => Broadcasting writes to multiple modules [patent_app_type] => utility [patent_app_number] => 16/250995 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14590381 [patent_doc_number] => 20190222799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => CABLE INTERFACE ENHANCING DEVICES AND METHOD [patent_app_type] => utility [patent_app_number] => 16/250350 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15887167 [patent_doc_number] => 10649928 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-12 [patent_title] => Broadcasting reads to multiple modules [patent_app_type] => utility [patent_app_number] => 16/247339 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16625795 [patent_doc_number] => 20210044448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => Transmission System for Control Data [patent_app_type] => utility [patent_app_number] => 16/966253 [patent_app_country] => US [patent_app_date] => 2019-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16966253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15670625 [patent_doc_number] => 10599542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Device configuration with cached pre-assembled driver state [patent_app_type] => utility [patent_app_number] => 16/241744 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 10220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14901601 [patent_doc_number] => 20190294566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/234895 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16248332 [patent_doc_number] => 10747692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Image processing accelerator [patent_app_type] => utility [patent_app_number] => 16/234508 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7269 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234508 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15685519 [patent_doc_number] => 20200097423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => MULTI-CORE ELECTRONIC SYSTEM [patent_app_type] => utility [patent_app_number] => 16/231420 [patent_app_country] => US [patent_app_date] => 2018-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16231420 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15789235 [patent_doc_number] => 10628342 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-21 [patent_title] => System and method for accelerating performance of non-volatile memory RAID stacks [patent_app_type] => utility [patent_app_number] => 16/228566 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15387085 [patent_doc_number] => 10534730 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-14 [patent_title] => Storing microcode for a virtual function in a trusted memory region [patent_app_type] => utility [patent_app_number] => 16/228360 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16171626 [patent_doc_number] => 10713196 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-14 [patent_title] => Flexible and scalable accelerator architecture [patent_app_type] => utility [patent_app_number] => 16/227875 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 23317 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16227875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16615698 [patent_doc_number] => 20210034351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => SOFTWARE UPDATE DEVICE AND SOFTWARE UPDATE METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 16/766953 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16766953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14189149 [patent_doc_number] => 20190114280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => LOGIC COMPONENT SWITCH [patent_app_type] => utility [patent_app_number] => 16/215719 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215719 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14571083 [patent_doc_number] => 20190213148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => TECHNIQUES TO ACCESS OR OPERATE A DUAL IN-LINE MEMORY MODULE VIA MULTIPLE DATA CHANNELS [patent_app_type] => utility [patent_app_number] => 16/208224 [patent_app_country] => US [patent_app_date] => 2018-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16208224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16683405 [patent_doc_number] => 10942884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Dual-edge triggered ring buffer and communication system [patent_app_type] => utility [patent_app_number] => 16/759626 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5366 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16759626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16145815 [patent_doc_number] => 10705978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Asynchronous tracking for high-frequency and high-volume storage [patent_app_type] => utility [patent_app_number] => 16/173978 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16047679 [patent_doc_number] => 10685718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Dynamic delay of NAND read commands [patent_app_type] => utility [patent_app_number] => 16/173557 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14411495 [patent_doc_number] => 20190171591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => HYBRID ARCHITECTURE FOR SIGNAL PROCESSING AND SIGNAL PROCESSING ACCELERATOR [patent_app_type] => utility [patent_app_number] => 16/169995 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16179111 [patent_doc_number] => 20200226079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => MEMORY MODULE WITH PROGRAMMABLE COMMAND BUFFER [patent_app_type] => utility [patent_app_number] => 16/631163 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16631163 [rel_patent_id] =>[rel_patent_doc_number] =>)