Search

John B Sotomayor

Examiner (ID: 832, Phone: (571)272-6978 , Office: P/3646 )

Most Active Art Unit
3662
Art Unit(s)
3662, 3642, 2202, 3646, 2201, 3641
Total Applications
2701
Issued Applications
2479
Pending Applications
70
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16615020 [patent_doc_number] => 20210033673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => PROGRAMMABLE INTEGRATED CIRCUIT WITH INTERNAL DIAGNOSTIC HARDWARE [patent_app_type] => utility [patent_app_number] => 16/528500 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528500
Programmable integrated circuit with internal diagnostic hardware Jul 30, 2019 Issued
Array ( [id] => 15155879 [patent_doc_number] => 20190356417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Method and Communications Device for Transmitting Information [patent_app_type] => utility [patent_app_number] => 16/526400 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526400 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/526400
Method and Communications Device for Transmitting Information Jul 29, 2019 Abandoned
Array ( [id] => 15094243 [patent_doc_number] => 20190341933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => DATA PROCESSING DEVICE AND DATA PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/517278 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 58064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 775 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517278 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517278
Data processing device and data processing method Jul 18, 2019 Issued
Array ( [id] => 15094245 [patent_doc_number] => 20190341934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => DATA PROCESSING DEVICE AND DATA PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/517308 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 54939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 480 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517308 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517308
Data processing device and data processing method Jul 18, 2019 Issued
Array ( [id] => 16684936 [patent_doc_number] => 10944432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Methods and systems for transcoder, FEC and interleaver optimization [patent_app_type] => utility [patent_app_number] => 16/516161 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6654 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516161
Methods and systems for transcoder, FEC and interleaver optimization Jul 17, 2019 Issued
Array ( [id] => 16584822 [patent_doc_number] => 20210019224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => SOFT-INPUT SOFT-OUTPUT COMPONENT CODE DECODER FOR GENERALIZED LOW-DENSITY PARITY-CHECK CODES [patent_app_type] => utility [patent_app_number] => 16/516110 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516110 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516110
Soft-input soft-output component code decoder for generalized low-density parity-check codes Jul 17, 2019 Issued
Array ( [id] => 16653175 [patent_doc_number] => 10930366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Storage device with test interface [patent_app_type] => utility [patent_app_number] => 16/514685 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514685 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514685
Storage device with test interface Jul 16, 2019 Issued
Array ( [id] => 16584680 [patent_doc_number] => 20210019082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => NONVOLATILE MEMORY BAD ROW MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/514195 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514195
Nonvolatile memory bad row management Jul 16, 2019 Issued
Array ( [id] => 16738689 [patent_doc_number] => 10964350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Setting bias currents and limiting corrosion in TMR sensors [patent_app_type] => utility [patent_app_number] => 16/506880 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 40 [patent_no_of_words] => 18766 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506880
Setting bias currents and limiting corrosion in TMR sensors Jul 8, 2019 Issued
Array ( [id] => 16116547 [patent_doc_number] => 20200210296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => THREE-DIMENSIONAL STACKED MEMORY DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 16/456094 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456094 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456094
Three-dimensional stacked memory device and method Jun 27, 2019 Issued
Array ( [id] => 15689477 [patent_doc_number] => 20200099402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => DATA DRIVEN ICAD GRAPH GENERATION [patent_app_type] => utility [patent_app_number] => 16/452466 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452466 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452466
Data driven ICAD graph generation Jun 24, 2019 Issued
Array ( [id] => 14968597 [patent_doc_number] => 20190311777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNCTIONS [patent_app_type] => utility [patent_app_number] => 16/449778 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449778 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449778
Memory interface latch with integrated write-through and fence functions Jun 23, 2019 Issued
Array ( [id] => 16448002 [patent_doc_number] => 10839933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Memory devices having a read function of data stored in a plurality of reference cells [patent_app_type] => utility [patent_app_number] => 16/445149 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 19272 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445149
Memory devices having a read function of data stored in a plurality of reference cells Jun 17, 2019 Issued
Array ( [id] => 15836969 [patent_doc_number] => 20200133767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => DATA STORAGE DEVICE AND ADAPTIVE DATA-READING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/441051 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441051 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441051
Data storage device and adaptive data-reading method thereof Jun 13, 2019 Issued
Array ( [id] => 16552837 [patent_doc_number] => 10886002 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-05 [patent_title] => NAND field use erase plus defect detections [patent_app_type] => utility [patent_app_number] => 16/440212 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9089 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440212 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440212
NAND field use erase plus defect detections Jun 12, 2019 Issued
Array ( [id] => 16386274 [patent_doc_number] => 10811115 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-20 [patent_title] => Test method for built-in memory in computer device [patent_app_type] => utility [patent_app_number] => 16/439718 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3899 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439718 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439718
Test method for built-in memory in computer device Jun 12, 2019 Issued
Array ( [id] => 16514847 [patent_doc_number] => 20200394105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => STORAGE SYSTEM WITH ERROR RECOVERY MECHANISM AND METHOD OF OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 16/440588 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440588
Storage system with error recovery mechanism and method of operation thereof Jun 12, 2019 Issued
Array ( [id] => 15966951 [patent_doc_number] => 20200167227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/440536 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440536 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440536
Storage device and operating method thereof Jun 12, 2019 Issued
Array ( [id] => 16833299 [patent_doc_number] => 11009546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Integrated communication link testing [patent_app_type] => utility [patent_app_number] => 16/440944 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 16542 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440944
Integrated communication link testing Jun 12, 2019 Issued
Array ( [id] => 16508171 [patent_doc_number] => 20200387427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => Adaptive Usage of Irregular Code Schemas Based on Specific System Level Triggers and Policies [patent_app_type] => utility [patent_app_number] => 16/433535 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17743 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433535
Adaptive usage of irregular code schemas based on specific system level triggers and policies Jun 5, 2019 Issued
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