John B Sotomayor
Examiner (ID: 832, Phone: (571)272-6978 , Office: P/3646 )
Most Active Art Unit | 3662 |
Art Unit(s) | 3662, 3642, 2202, 3646, 2201, 3641 |
Total Applications | 2701 |
Issued Applications | 2479 |
Pending Applications | 70 |
Abandoned Applications | 152 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 11021796
[patent_doc_number] => 20160218751
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-28
[patent_title] => 'High/Low Energy Zone Data Storage'
[patent_app_type] => utility
[patent_app_number] => 15/002656
[patent_app_country] => US
[patent_app_date] => 2016-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7180
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15002656
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/002656 | High/low energy zone data storage | Jan 20, 2016 | Issued |
Array
(
[id] => 11080183
[patent_doc_number] => 20160277148
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-22
[patent_title] => 'METHOD AND DEVICE FOR PROTECTING A DATA TRANSPORT BLOCK AGAINST MEMORY ERRORS AND TRANSMISSION ERRORS'
[patent_app_type] => utility
[patent_app_number] => 14/993311
[patent_app_country] => US
[patent_app_date] => 2016-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8516
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14993311
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/993311 | Method and device for protecting a data transport block against memory errors and transmission errors | Jan 11, 2016 | Issued |
Array
(
[id] => 11731387
[patent_doc_number] => 20170192830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-06
[patent_title] => 'HIGH-SPEED PSEUDO-RANDOM BIT SEQUENCE (PRBS) PATTERN GENERATOR, ERROR DETECTOR AND ERROR COUNTER'
[patent_app_type] => utility
[patent_app_number] => 14/986347
[patent_app_country] => US
[patent_app_date] => 2015-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5984
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14986347
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/986347 | HIGH-SPEED PSEUDO-RANDOM BIT SEQUENCE (PRBS) PATTERN GENERATOR, ERROR DETECTOR AND ERROR COUNTER | Dec 30, 2015 | Abandoned |
Array
(
[id] => 13725677
[patent_doc_number] => 20170373794
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-28
[patent_title] => METHOD AND APPARATUS FOR PERFORMING UPLINK TRANSMISSION FOR USER EQUIPMENT REQUIRING COVERAGE ENHANCEMENTS IN WIRELESS COMMUNICATION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 15/540154
[patent_app_country] => US
[patent_app_date] => 2015-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6846
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15540154
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/540154 | Method and apparatus for performing uplink transmission for user equipment requiring coverage enhancements in wireless communication system | Dec 27, 2015 | Issued |
Array
(
[id] => 11109724
[patent_doc_number] => 20160306694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'Iterative Soft Information Correction and Decoding'
[patent_app_type] => utility
[patent_app_number] => 14/973603
[patent_app_country] => US
[patent_app_date] => 2015-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 11216
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14973603
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/973603 | Iterative soft information correction and decoding | Dec 16, 2015 | Issued |
Array
(
[id] => 13226659
[patent_doc_number] => 10127105
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-11-13
[patent_title] => Techniques for extending grids in data storage systems
[patent_app_type] => utility
[patent_app_number] => 14/973708
[patent_app_country] => US
[patent_app_date] => 2015-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 17203
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 274
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14973708
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/973708 | Techniques for extending grids in data storage systems | Dec 16, 2015 | Issued |
Array
(
[id] => 11692397
[patent_doc_number] => 20170168112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'METHOD FOR ENHANCED SEMICONDUCTOR PRODUCT DIAGNOSTIC FAIL SIGNATURE DETECTION'
[patent_app_type] => utility
[patent_app_number] => 14/969119
[patent_app_country] => US
[patent_app_date] => 2015-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8511
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969119
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/969119 | Method for enhanced semiconductor product diagnostic fail signature detection | Dec 14, 2015 | Issued |
Array
(
[id] => 11694185
[patent_doc_number] => 20170169902
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'SYSTEMS, METHODS, AND COMPUTER PROGRAMS FOR RESOLVING DRAM DEFECTS'
[patent_app_type] => utility
[patent_app_number] => 14/970273
[patent_app_country] => US
[patent_app_date] => 2015-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6279
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970273
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/970273 | Systems, methods, and computer programs for resolving dram defects | Dec 14, 2015 | Issued |
Array
(
[id] => 11693182
[patent_doc_number] => 20170168897
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'DISTRIBUTED CODING FOR MULTIPLE DIMENSIONAL PARITIES'
[patent_app_type] => utility
[patent_app_number] => 14/968713
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9629
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968713
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968713 | Distributed coding for multiple dimensional parities | Dec 13, 2015 | Issued |
Array
(
[id] => 10827062
[patent_doc_number] => 20160173232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-16
[patent_title] => 'MITIGATION OF BURSTY INTERFERENCE'
[patent_app_type] => utility
[patent_app_number] => 14/968376
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 17975
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968376
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968376 | Mitigation of bursty interference | Dec 13, 2015 | Issued |
Array
(
[id] => 11366055
[patent_doc_number] => 20170004037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'MEMORY DEVICE WITH DIFFERENT PARITY REGIONS'
[patent_app_type] => utility
[patent_app_number] => 14/966571
[patent_app_country] => US
[patent_app_date] => 2015-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7731
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14966571
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/966571 | Memory device with different parity regions | Dec 10, 2015 | Issued |
Array
(
[id] => 13172057
[patent_doc_number] => 10102145
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-10-16
[patent_title] => Out of order LBA processing
[patent_app_type] => utility
[patent_app_number] => 14/961762
[patent_app_country] => US
[patent_app_date] => 2015-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7186
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961762
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/961762 | Out of order LBA processing | Dec 6, 2015 | Issued |
Array
(
[id] => 11019366
[patent_doc_number] => 20160216319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-28
[patent_title] => 'INTEGRATED CIRCUIT AND STORAGE DEVICE INCLUDING INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/957987
[patent_app_country] => US
[patent_app_date] => 2015-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 15545
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14957987
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/957987 | Integrated circuit and storage device including integrated circuit | Dec 2, 2015 | Issued |
Array
(
[id] => 13710709
[patent_doc_number] => 20170366309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-21
[patent_title] => INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/527598
[patent_app_country] => US
[patent_app_date] => 2015-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18147
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15527598
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/527598 | Information processing system, information processing method, and information processing device | Nov 17, 2015 | Issued |
Array
(
[id] => 11019963
[patent_doc_number] => 20160216916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-28
[patent_title] => 'MEMORY BUFFER WITH DATA SCRAMBLING AND ERROR CORRECTION'
[patent_app_type] => utility
[patent_app_number] => 14/923345
[patent_app_country] => US
[patent_app_date] => 2015-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7323
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14923345
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/923345 | Memory buffer with data scrambling and error correction | Oct 25, 2015 | Issued |
Array
(
[id] => 11488554
[patent_doc_number] => 09594625
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-14
[patent_title] => 'Sequential circuit with error detection'
[patent_app_type] => utility
[patent_app_number] => 14/878985
[patent_app_country] => US
[patent_app_date] => 2015-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2704
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14878985
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/878985 | Sequential circuit with error detection | Oct 7, 2015 | Issued |
Array
(
[id] => 10660279
[patent_doc_number] => 20160006423
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-07
[patent_title] => 'CONTINUOUS ADAPTIVE DATA CAPTURE OPTIMIZATION FOR INTERFACE CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 14/850792
[patent_app_country] => US
[patent_app_date] => 2015-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9491
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850792
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/850792 | Continuous adaptive data capture optimization for interface circuits | Sep 9, 2015 | Issued |
Array
(
[id] => 11278764
[patent_doc_number] => 09495243
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-15
[patent_title] => 'Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems'
[patent_app_type] => utility
[patent_app_number] => 14/841607
[patent_app_country] => US
[patent_app_date] => 2015-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5221
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14841607
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/841607 | Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems | Aug 30, 2015 | Issued |
Array
(
[id] => 13281321
[patent_doc_number] => 10152244
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-11
[patent_title] => Programmable memory command sequencer
[patent_app_type] => utility
[patent_app_number] => 14/840368
[patent_app_country] => US
[patent_app_date] => 2015-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5261
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14840368
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/840368 | Programmable memory command sequencer | Aug 30, 2015 | Issued |
Array
(
[id] => 13820595
[patent_doc_number] => 10187084
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-22
[patent_title] => Method of encoding data and data storage system
[patent_app_type] => utility
[patent_app_number] => 15/510216
[patent_app_country] => US
[patent_app_date] => 2015-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 9147
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15510216
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/510216 | Method of encoding data and data storage system | Aug 27, 2015 | Issued |