John B Sotomayor
Examiner (ID: 832, Phone: (571)272-6978 , Office: P/3646 )
Most Active Art Unit | 3662 |
Art Unit(s) | 3662, 3642, 2202, 3646, 2201, 3641 |
Total Applications | 2701 |
Issued Applications | 2479 |
Pending Applications | 70 |
Abandoned Applications | 152 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18073519
[patent_doc_number] => 11532356
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-20
[patent_title] => Self-healing dot-product engine
[patent_app_type] => utility
[patent_app_number] => 17/223435
[patent_app_country] => US
[patent_app_date] => 2021-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 6138
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223435
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/223435 | Self-healing dot-product engine | Apr 5, 2021 | Issued |
Array
(
[id] => 18130212
[patent_doc_number] => 11556420
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-17
[patent_title] => Managing error correction coding in memory systems
[patent_app_type] => utility
[patent_app_number] => 17/223545
[patent_app_country] => US
[patent_app_date] => 2021-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12597
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223545
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/223545 | Managing error correction coding in memory systems | Apr 5, 2021 | Issued |
Array
(
[id] => 17979273
[patent_doc_number] => 11496153
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-08
[patent_title] => Coded stream processing
[patent_app_type] => utility
[patent_app_number] => 17/222576
[patent_app_country] => US
[patent_app_date] => 2021-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6225
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222576
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/222576 | Coded stream processing | Apr 4, 2021 | Issued |
Array
(
[id] => 17917210
[patent_doc_number] => 20220319606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => Adaptively Programming Memory Cells in Different Modes to Optimize Performance
[patent_app_type] => utility
[patent_app_number] => 17/221412
[patent_app_country] => US
[patent_app_date] => 2021-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20795
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221412
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/221412 | Adaptively programming memory cells in different modes to optimize performance | Apr 1, 2021 | Issued |
Array
(
[id] => 17899297
[patent_doc_number] => 20220308959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => COMPRESSION-BASED DATA OPERATIONS IN A MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/216087
[patent_app_country] => US
[patent_app_date] => 2021-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6711
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216087
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/216087 | Compression-based data operations in a memory device | Mar 28, 2021 | Issued |
Array
(
[id] => 16964710
[patent_doc_number] => 20210216209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-15
[patent_title] => Proactive Data Rebuild Based On Queue Feedback
[patent_app_type] => utility
[patent_app_number] => 17/213697
[patent_app_country] => US
[patent_app_date] => 2021-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9045
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213697
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/213697 | Multiple read data paths in a storage system | Mar 25, 2021 | Issued |
Array
(
[id] => 17970082
[patent_doc_number] => 11487615
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-01
[patent_title] => Semiconductor memory devices and methods of operating semiconductor memory devices
[patent_app_type] => utility
[patent_app_number] => 17/205276
[patent_app_country] => US
[patent_app_date] => 2021-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 27
[patent_no_of_words] => 11122
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205276
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/205276 | Semiconductor memory devices and methods of operating semiconductor memory devices | Mar 17, 2021 | Issued |
Array
(
[id] => 17485678
[patent_doc_number] => 20220093182
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => STORAGE DEVICE AND READING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/201462
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14569
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201462
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/201462 | Storage device and reading method | Mar 14, 2021 | Issued |
Array
(
[id] => 17621931
[patent_doc_number] => 11340987
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-05-24
[patent_title] => Methods and systems for raid protection in zoned solid-state drives
[patent_app_type] => utility
[patent_app_number] => 17/192606
[patent_app_country] => US
[patent_app_date] => 2021-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 7815
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17192606
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/192606 | Methods and systems for raid protection in zoned solid-state drives | Mar 3, 2021 | Issued |
Array
(
[id] => 16920150
[patent_doc_number] => 20210193242
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => TSV Auto Repair Scheme On Stacked Die
[patent_app_type] => utility
[patent_app_number] => 17/173064
[patent_app_country] => US
[patent_app_date] => 2021-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5262
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17173064
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/173064 | TSV auto repair scheme on stacked die | Feb 9, 2021 | Issued |
Array
(
[id] => 16905784
[patent_doc_number] => 20210184700
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => METHODS AND SYSTEMS FOR TRANSCODER, FEC AND INTERLEAVER OPTIMIZATION
[patent_app_type] => utility
[patent_app_number] => 17/167000
[patent_app_country] => US
[patent_app_date] => 2021-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6655
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167000
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/167000 | Methods and systems for transcoder, FEC and interleaver optimization | Feb 2, 2021 | Issued |
Array
(
[id] => 16859263
[patent_doc_number] => 20210160008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => DATA PROCESSING METHOD AND COMMUNICATIONS DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/165702
[patent_app_country] => US
[patent_app_date] => 2021-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12611
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165702
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/165702 | Data processing method and communications device | Feb 1, 2021 | Issued |
Array
(
[id] => 18053907
[patent_doc_number] => 11527298
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-12-13
[patent_title] => On-chip memory diagnostics
[patent_app_type] => utility
[patent_app_number] => 17/162347
[patent_app_country] => US
[patent_app_date] => 2021-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5993
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162347
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/162347 | On-chip memory diagnostics | Jan 28, 2021 | Issued |
Array
(
[id] => 16827568
[patent_doc_number] => 20210142861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-13
[patent_title] => ELECTRICAL DEVICE WITH TEST INTERFACE
[patent_app_type] => utility
[patent_app_number] => 17/152352
[patent_app_country] => US
[patent_app_date] => 2021-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6224
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17152352
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/152352 | Electrical device with test interface | Jan 18, 2021 | Issued |
Array
(
[id] => 17401620
[patent_doc_number] => 20220043710
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => DATA STORAGE APPARATUS AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/149314
[patent_app_country] => US
[patent_app_date] => 2021-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8610
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149314
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/149314 | Data storage apparatus and operating method thereof | Jan 13, 2021 | Issued |
Array
(
[id] => 16952537
[patent_doc_number] => 20210211229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-08
[patent_title] => PROBABILISTIC AMPLITUDE SHAPING
[patent_app_type] => utility
[patent_app_number] => 17/140626
[patent_app_country] => US
[patent_app_date] => 2021-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27764
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140626
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/140626 | Probabilistic amplitude shaping | Jan 3, 2021 | Issued |
Array
(
[id] => 17977405
[patent_doc_number] => 11494265
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-08
[patent_title] => Securing against errors in an error correcting code (ECC) implemented in an automotive system
[patent_app_type] => utility
[patent_app_number] => 17/139413
[patent_app_country] => US
[patent_app_date] => 2020-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 15158
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139413
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/139413 | Securing against errors in an error correcting code (ECC) implemented in an automotive system | Dec 30, 2020 | Issued |
Array
(
[id] => 16782565
[patent_doc_number] => 20210119644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => TRANSMITTER AND METHOD FOR GENERATING ADDITIONAL PARITY THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/138080
[patent_app_country] => US
[patent_app_date] => 2020-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 32591
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138080
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/138080 | Transmitter and method for generating additional parity thereof | Dec 29, 2020 | Issued |
Array
(
[id] => 17786477
[patent_doc_number] => 11409600
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Increased memory access parallelism using parity
[patent_app_type] => utility
[patent_app_number] => 17/136863
[patent_app_country] => US
[patent_app_date] => 2020-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 14680
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136863
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/136863 | Increased memory access parallelism using parity | Dec 28, 2020 | Issued |
Array
(
[id] => 17408964
[patent_doc_number] => 11249848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-15
[patent_title] => Error check code (ECC) decoder and memory system including ECC decoder
[patent_app_type] => utility
[patent_app_number] => 17/134961
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 40
[patent_no_of_words] => 12805
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134961
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/134961 | Error check code (ECC) decoder and memory system including ECC decoder | Dec 27, 2020 | Issued |