Search

John B Sotomayor

Examiner (ID: 832, Phone: (571)272-6978 , Office: P/3646 )

Most Active Art Unit
3662
Art Unit(s)
3662, 3642, 2202, 3646, 2201, 3641
Total Applications
2701
Issued Applications
2479
Pending Applications
70
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11510055 [patent_doc_number] => 09601219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Method, memory controller, and memory system for reading data stored in flash memory' [patent_app_type] => utility [patent_app_number] => 14/666316 [patent_app_country] => US [patent_app_date] => 2015-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 15541 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14666316 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/666316
Method, memory controller, and memory system for reading data stored in flash memory Mar 23, 2015 Issued
Array ( [id] => 11631607 [patent_doc_number] => 20170141797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'METHOD AND DEVICE FOR AN ERROR CORRECTION OF TRANS' [patent_app_type] => utility [patent_app_number] => 15/127738 [patent_app_country] => US [patent_app_date] => 2015-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7718 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15127738 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/127738
METHOD AND DEVICE FOR AN ERROR CORRECTION OF TRANS Mar 18, 2015 Abandoned
Array ( [id] => 13189429 [patent_doc_number] => 10110253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Receiver [patent_app_type] => utility [patent_app_number] => 15/125870 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10519 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15125870 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/125870
Receiver Mar 2, 2015 Issued
Array ( [id] => 10432195 [patent_doc_number] => 20150317207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'Field-Repair System and Method' [patent_app_type] => utility [patent_app_number] => 14/637373 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14637373 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/637373
Field-Repair System and Method Mar 2, 2015 Abandoned
Array ( [id] => 12456696 [patent_doc_number] => 09984768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-29 [patent_title] => Distributing storage of ECC code words [patent_app_type] => utility [patent_app_number] => 14/601806 [patent_app_country] => US [patent_app_date] => 2015-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 17511 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14601806 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/601806
Distributing storage of ECC code words Jan 20, 2015 Issued
Array ( [id] => 11345269 [patent_doc_number] => 09529676 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Optimizing spare capacity and spare distribution' [patent_app_type] => utility [patent_app_number] => 14/587371 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 9214 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587371 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/587371
Optimizing spare capacity and spare distribution Dec 30, 2014 Issued
Array ( [id] => 13143675 [patent_doc_number] => 10089172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Package on package memory interface and configuration with error code correction [patent_app_type] => utility [patent_app_number] => 14/587878 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3855 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587878 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/587878
Package on package memory interface and configuration with error code correction Dec 30, 2014 Issued
Array ( [id] => 11769424 [patent_doc_number] => 09378088 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-28 [patent_title] => 'Method and system for reclamation of distributed dynamically generated erasure groups for data migration between high performance computing architectures and data storage using non-deterministic data addressing' [patent_app_type] => utility [patent_app_number] => 14/586346 [patent_app_country] => US [patent_app_date] => 2014-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 13 [patent_no_of_words] => 20397 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14586346 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/586346
Method and system for reclamation of distributed dynamically generated erasure groups for data migration between high performance computing architectures and data storage using non-deterministic data addressing Dec 29, 2014 Issued
Array ( [id] => 10293156 [patent_doc_number] => 20150178155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'MEMORY CONTROLLER, STORAGE DEVICE INCLUDING THE SAME AND DATA ENCODING AND DECODING METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/580815 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7626 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14580815 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/580815
Memory controller, storage device including the same and data encoding and decoding methods thereof Dec 22, 2014 Issued
Array ( [id] => 10215871 [patent_doc_number] => 20150100863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'METHOD AND APPARATUS FOR ENCODING AND DECODING A HIGH SPEED SHARED CONTROL CHANNEL' [patent_app_type] => utility [patent_app_number] => 14/570228 [patent_app_country] => US [patent_app_date] => 2014-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3512 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14570228 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/570228
METHOD AND APPARATUS FOR ENCODING AND DECODING A HIGH SPEED SHARED CONTROL CHANNEL Dec 14, 2014 Abandoned
Array ( [id] => 10125992 [patent_doc_number] => 09160367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Integrated-interleaved low density parity check (LDPC) codes' [patent_app_type] => utility [patent_app_number] => 14/567607 [patent_app_country] => US [patent_app_date] => 2014-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14567607 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/567607
Integrated-interleaved low density parity check (LDPC) codes Dec 10, 2014 Issued
Array ( [id] => 10501427 [patent_doc_number] => 09229828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Mechanism for achieving high memory reliability, availability and serviceability' [patent_app_type] => utility [patent_app_number] => 14/563761 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4736 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563761 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/563761
Mechanism for achieving high memory reliability, availability and serviceability Dec 7, 2014 Issued
Array ( [id] => 11029571 [patent_doc_number] => 20160226527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'MAP DECODING METHOD USING AUGMENTED LATTICES' [patent_app_type] => utility [patent_app_number] => 15/026433 [patent_app_country] => US [patent_app_date] => 2014-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4259 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15026433 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/026433
Map decoding method using augmented lattices Sep 28, 2014 Issued
Array ( [id] => 10439271 [patent_doc_number] => 20150324283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'FLASH MEMORY CONTROL CHIP AND DATA STORAGE DEVICE AND FLASH MEMORY CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/469703 [patent_app_country] => US [patent_app_date] => 2014-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4065 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14469703 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/469703
Flash memory control chip and data storage device and flash memory control method Aug 26, 2014 Issued
Array ( [id] => 12040258 [patent_doc_number] => 09818493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Memory device, memory system, and method for operating memory device' [patent_app_type] => utility [patent_app_number] => 14/469159 [patent_app_country] => US [patent_app_date] => 2014-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7977 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14469159 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/469159
Memory device, memory system, and method for operating memory device Aug 25, 2014 Issued
Array ( [id] => 10665790 [patent_doc_number] => 20160011934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'DECODING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/467052 [patent_app_country] => US [patent_app_date] => 2014-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10933 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14467052 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/467052
Decoding method, memory control circuit unit and memory storage device Aug 24, 2014 Issued
Array ( [id] => 12479931 [patent_doc_number] => 09991907 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-05 [patent_title] => Concatenates of an E8 lattice with binary and non binary codes [patent_app_type] => utility [patent_app_number] => 14/466361 [patent_app_country] => US [patent_app_date] => 2014-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9405 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14466361 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/466361
Concatenates of an E8 lattice with binary and non binary codes Aug 21, 2014 Issued
Array ( [id] => 13185927 [patent_doc_number] => 10108483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Computing system with error handling mechanism and method of operation thereof [patent_app_type] => utility [patent_app_number] => 14/465694 [patent_app_country] => US [patent_app_date] => 2014-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 19020 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14465694 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/465694
Computing system with error handling mechanism and method of operation thereof Aug 20, 2014 Issued
Array ( [id] => 10956379 [patent_doc_number] => 20140359401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'Field-Repair System and Method' [patent_app_type] => utility [patent_app_number] => 14/461531 [patent_app_country] => US [patent_app_date] => 2014-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14461531 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/461531
Field-Repair System and Method Aug 17, 2014 Abandoned
Array ( [id] => 9866755 [patent_doc_number] => 20150046774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND ERROR CORRECTION INFORMATION WRITING METHOD' [patent_app_type] => utility [patent_app_number] => 14/457666 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11118 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457666 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457666
Semiconductor device and error correction information writing method Aug 11, 2014 Issued
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