John B Sotomayor
Examiner (ID: 832, Phone: (571)272-6978 , Office: P/3646 )
Most Active Art Unit | 3662 |
Art Unit(s) | 3662, 3642, 2202, 3646, 2201, 3641 |
Total Applications | 2701 |
Issued Applications | 2479 |
Pending Applications | 70 |
Abandoned Applications | 152 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 10369124
[patent_doc_number] => 20150254129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-10
[patent_title] => 'Error Checking and Correction for NAND Flash Devices'
[patent_app_type] => utility
[patent_app_number] => 14/197707
[patent_app_country] => US
[patent_app_date] => 2014-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13194
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14197707
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/197707 | Error checking and correction for NAND flash devices | Mar 4, 2014 | Issued |
Array
(
[id] => 9723113
[patent_doc_number] => 20140258814
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-11
[patent_title] => 'METHOD OF TRANSFERRING EXTRINSIC INFORMATION OF TURBO DECODER AND APPARATUS USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/194235
[patent_app_country] => US
[patent_app_date] => 2014-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3264
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14194235
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/194235 | METHOD OF TRANSFERRING EXTRINSIC INFORMATION OF TURBO DECODER AND APPARATUS USING THE SAME | Feb 27, 2014 | Abandoned |
Array
(
[id] => 11347078
[patent_doc_number] => 09531499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-27
[patent_title] => 'Methods and apparatus for dynamic transmission of retransmission requests'
[patent_app_type] => utility
[patent_app_number] => 14/192626
[patent_app_country] => US
[patent_app_date] => 2014-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 13055
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14192626
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/192626 | Methods and apparatus for dynamic transmission of retransmission requests | Feb 26, 2014 | Issued |
Array
(
[id] => 11917313
[patent_doc_number] => 09785499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-10
[patent_title] => 'Hot-read data aggregation and code selection'
[patent_app_type] => utility
[patent_app_number] => 14/192110
[patent_app_country] => US
[patent_app_date] => 2014-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4849
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14192110
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/192110 | Hot-read data aggregation and code selection | Feb 26, 2014 | Issued |
Array
(
[id] => 10359392
[patent_doc_number] => 20150244397
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-27
[patent_title] => 'Method Of Efficient FEC Decoder Scheduling And Receiver Pipeline Flow Control And Apparatus Using The Same'
[patent_app_type] => utility
[patent_app_number] => 14/190480
[patent_app_country] => US
[patent_app_date] => 2014-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8635
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14190480
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/190480 | Method Of Efficient FEC Decoder Scheduling And Receiver Pipeline Flow Control And Apparatus Using The Same | Feb 25, 2014 | Abandoned |
Array
(
[id] => 10496291
[patent_doc_number] => 20150381313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-31
[patent_title] => 'METHOD AND APPARATUS OF DOWNSTREAM FORWARD ERROR CORRECTION ON-OFF CONTROL IN XG-PON1 AND NG-PON2 TWDM-PON SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 14/767838
[patent_app_country] => US
[patent_app_date] => 2014-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7833
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14767838
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/767838 | Method and apparatus of downstream forward error correction on-off control in XG-PON1 and NG-PON2 TWDM-PON systems | Feb 24, 2014 | Issued |
Array
(
[id] => 9669817
[patent_doc_number] => 20140233680
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-21
[patent_title] => 'MAP DECODER HAVING LOW LATENCY AND OPERATION METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/187128
[patent_app_country] => US
[patent_app_date] => 2014-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3493
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14187128
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/187128 | MAP DECODER HAVING LOW LATENCY AND OPERATION METHOD OF THE SAME | Feb 20, 2014 | Abandoned |
Array
(
[id] => 11467510
[patent_doc_number] => 09584160
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-28
[patent_title] => 'Dynamically configuring erasure code redundancy and distribution'
[patent_app_type] => utility
[patent_app_number] => 14/185331
[patent_app_country] => US
[patent_app_date] => 2014-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6240
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 374
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185331
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/185331 | Dynamically configuring erasure code redundancy and distribution | Feb 19, 2014 | Issued |
Array
(
[id] => 9658783
[patent_doc_number] => 20140229788
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'LDPC DESIGN FOR HIGH RATE, HIGH PARALLELISM, AND LOW ERROR FLOOR'
[patent_app_type] => utility
[patent_app_number] => 14/179871
[patent_app_country] => US
[patent_app_date] => 2014-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5874
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14179871
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/179871 | LDPC DESIGN FOR HIGH RATE, HIGH PARALLELISM, AND LOW ERROR FLOOR | Feb 12, 2014 | Abandoned |
Array
(
[id] => 10342418
[patent_doc_number] => 20150227423
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-13
[patent_title] => 'Mitigating The Impact Of A Single Point Of Failure In An Object Store'
[patent_app_type] => utility
[patent_app_number] => 14/180149
[patent_app_country] => US
[patent_app_date] => 2014-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7811
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14180149
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/180149 | Mitigating the impact of a single point of failure in an object store | Feb 12, 2014 | Issued |
Array
(
[id] => 10327871
[patent_doc_number] => 20150212875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-30
[patent_title] => 'DYNAMIC DATA DENSITY ECC'
[patent_app_type] => utility
[patent_app_number] => 14/167927
[patent_app_country] => US
[patent_app_date] => 2014-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5764
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14167927
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/167927 | Dynamic data density ECC | Jan 28, 2014 | Issued |
Array
(
[id] => 10496292
[patent_doc_number] => 20150381314
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-31
[patent_title] => 'WIRELESS DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/769277
[patent_app_country] => US
[patent_app_date] => 2013-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6150
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14769277
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/769277 | WIRELESS DEVICE | Dec 2, 2013 | Abandoned |
Array
(
[id] => 10512667
[patent_doc_number] => 09240245
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-01-19
[patent_title] => 'Memory efficient triggers of read disturb checks in solid state storage'
[patent_app_type] => utility
[patent_app_number] => 14/011453
[patent_app_country] => US
[patent_app_date] => 2013-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6550
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14011453
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/011453 | Memory efficient triggers of read disturb checks in solid state storage | Aug 26, 2013 | Issued |
Array
(
[id] => 10818381
[patent_doc_number] => 20160164544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-09
[patent_title] => 'Adaptation of Forward Error Correction Code and/or Modulation'
[patent_app_type] => utility
[patent_app_number] => 14/907710
[patent_app_country] => US
[patent_app_date] => 2013-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8895
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14907710
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/907710 | Adaptation of forward error correction code and/or modulation | Aug 8, 2013 | Issued |
Array
(
[id] => 12194635
[patent_doc_number] => 09898365
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-20
[patent_title] => 'Global error correction'
[patent_app_type] => utility
[patent_app_number] => 14/899708
[patent_app_country] => US
[patent_app_date] => 2013-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7513
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14899708
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/899708 | Global error correction | Jul 30, 2013 | Issued |
Array
(
[id] => 9332622
[patent_doc_number] => 20140059404
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'MEMORY CONTROL DEVICE, MEMORY DEVICE, INFORMATION PROCESSING SYSTEM AND MEMORY CONTROL METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/953960
[patent_app_country] => US
[patent_app_date] => 2013-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 10439
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13953960
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/953960 | MEMORY CONTROL DEVICE, MEMORY DEVICE, INFORMATION PROCESSING SYSTEM AND MEMORY CONTROL METHOD | Jul 29, 2013 | Abandoned |
Array
(
[id] => 9859961
[patent_doc_number] => 20150039978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-05
[patent_title] => 'Systems and Methods for Hybrid Priority Based Data Processing'
[patent_app_type] => utility
[patent_app_number] => 13/954573
[patent_app_country] => US
[patent_app_date] => 2013-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6398
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13954573
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/954573 | Systems and Methods for Hybrid Priority Based Data Processing | Jul 29, 2013 | Abandoned |
Array
(
[id] => 9800856
[patent_doc_number] => 20150012800
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-01-08
[patent_title] => 'Systems and Methods for Correlation Based Data Alignment'
[patent_app_type] => utility
[patent_app_number] => 13/952415
[patent_app_country] => US
[patent_app_date] => 2013-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10777
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13952415
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/952415 | Systems and methods for correlation based data alignment | Jul 25, 2013 | Issued |
Array
(
[id] => 9283025
[patent_doc_number] => 20140032993
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-30
[patent_title] => 'METHOD FOR MANAGING DATA STORED IN FLASH MEMORY AND ASSOCIATED MEMORY DEVICE AND CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/950301
[patent_app_country] => US
[patent_app_date] => 2013-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2635
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13950301
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/950301 | Method for managing data stored in flash memory and associated memory device and controller | Jul 24, 2013 | Issued |
Array
(
[id] => 11788784
[patent_doc_number] => 09398295
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-19
[patent_title] => 'Method and apparatus for unequal error protection in transmitting uncompressed video with various type over wideband high frequency wireless system'
[patent_app_type] => utility
[patent_app_number] => 13/950986
[patent_app_country] => US
[patent_app_date] => 2013-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5109
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13950986
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/950986 | Method and apparatus for unequal error protection in transmitting uncompressed video with various type over wideband high frequency wireless system | Jul 24, 2013 | Issued |