John B Sotomayor

Array ( [id] => 9540215 [patent_doc_number] => 20140164862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'ELECTRONIC DEVICE TESTING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/949191 [patent_app_country] => US [patent_app_date] => 2013-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1079 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13949191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10934655 [patent_doc_number] => 20140337676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'Systems and Methods for Processing Data With Microcontroller Based Retry Features' [patent_app_type] => utility [patent_app_number] => 13/947768 [patent_app_country] => US [patent_app_date] => 2013-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6178 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9372574 [patent_doc_number] => 20140082447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'METHODS AND APPARATUS FOR ENHANCED STATUS RETRANSMISSION' [patent_app_type] => utility [patent_app_number] => 13/944602 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10616 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9297051 [patent_doc_number] => 20140040684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'SYSTEM FOR PACKET COMMUNICATION AND COMMUNICATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/939582 [patent_app_country] => US [patent_app_date] => 2013-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9579 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13939582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9795049 [patent_doc_number] => 20150006993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'EMBEDDED ECC ADDRESS MAPPING' [patent_app_type] => utility [patent_app_number] => 13/930600 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6051 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13930600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8991955 [patent_doc_number] => 20130219236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'Controlling Scan Access to a Scan Chain' [patent_app_type] => utility [patent_app_number] => 13/850371 [patent_app_country] => US [patent_app_date] => 2013-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4748 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13850371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10493801 [patent_doc_number] => 20150378823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'MEMORY DEVICE HAVING ERROR CORRECTION LOGIC' [patent_app_type] => utility [patent_app_number] => 14/767479 [patent_app_country] => US [patent_app_date] => 2013-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2781 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14767479 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10493779 [patent_doc_number] => 20150378800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'STORAGE DEVICE AND STORAGE DEVICE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/233939 [patent_app_country] => US [patent_app_date] => 2013-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14805 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14233939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9746070 [patent_doc_number] => 20140281789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'ADAPTIVE MULTI-CORE, MULTI-DIRECTION TURBO DECODER AND RELATED DECODING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/798109 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7478 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13798109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9451794 [patent_doc_number] => 20140122964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'ERROR CHECKING AND CORRECTION METHOD FOR DETERMINING AN ERROR CORRECTION CODE LENGTH AND RELATED ERROR CHECKING AND CORRECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/798185 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4748 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13798185 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9746060 [patent_doc_number] => 20140281779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'ITERATIVE KALMAN FILTERING' [patent_app_type] => utility [patent_app_number] => 13/796707 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6521 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13796707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13083147 [patent_doc_number] => 10061640 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-28 [patent_title] => Soft-decision input generation for data storage systems [patent_app_type] => utility [patent_app_number] => 13/797943 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6215 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13797943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9513323 [patent_doc_number] => 20140149815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'SYSTEM AND METHOD FOR PROGRAMMING CHIPS ON CIRCUIT BOARD THROUGH BOUNDARY SCAN TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 13/795184 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3084 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12174334 [patent_doc_number] => 09892479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-13 [patent_title] => 'Independent monitoring of graphics processing units' [patent_app_type] => utility [patent_app_number] => 13/795735 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3000 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9745943 [patent_doc_number] => 20140281662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DYNAMICALLY ADAPTIVE BIT-LEVELING FOR DATA INTERFACES' [patent_app_type] => utility [patent_app_number] => 13/797200 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6734 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13797200 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11791094 [patent_doc_number] => 09400721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'Error correction code seeding' [patent_app_type] => utility [patent_app_number] => 13/793920 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4505 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13793920 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11788205 [patent_doc_number] => 09397701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-19 [patent_title] => 'System and method for lifetime specific LDPC decoding' [patent_app_type] => utility [patent_app_number] => 13/792831 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6516 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13792831 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10137558 [patent_doc_number] => 09170878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Memory buffer with data scrambling and error correction' [patent_app_type] => utility [patent_app_number] => 13/791124 [patent_app_country] => US [patent_app_date] => 2013-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 27 [patent_no_of_words] => 7310 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13791124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9036322 [patent_doc_number] => 20130238960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'METHODS AND APPARATUS FOR MAXIMUM UTILIZATION OF A DYNAMIC VARYING DIGITAL DATA CHANNEL' [patent_app_type] => utility [patent_app_number] => 13/790231 [patent_app_country] => US [patent_app_date] => 2013-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2773 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13790231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11904131 [patent_doc_number] => 09773570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Built-in-self-test (BIST) test time reduction' [patent_app_type] => utility [patent_app_number] => 13/786572 [patent_app_country] => US [patent_app_date] => 2013-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5057 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786572 [rel_patent_id] =>[rel_patent_doc_number] =>)