Search

John B Sotomayor

Examiner (ID: 832, Phone: (571)272-6978 , Office: P/3646 )

Most Active Art Unit
3662
Art Unit(s)
3662, 3642, 2202, 3646, 2201, 3641
Total Applications
2701
Issued Applications
2479
Pending Applications
70
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10004763 [patent_doc_number] => 09048866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Apparatus and method for checking decoded data, apparatus and method for decoding, and receiving terminal' [patent_app_type] => utility [patent_app_number] => 13/784910 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13784910 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/784910
Apparatus and method for checking decoded data, apparatus and method for decoding, and receiving terminal Mar 4, 2013 Issued
Array ( [id] => 9700667 [patent_doc_number] => 20140250352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'Systems and Methods for Signal Reduction Based Data Processor Marginalization' [patent_app_type] => utility [patent_app_number] => 13/784369 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13784369 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/784369
Systems and Methods for Signal Reduction Based Data Processor Marginalization Mar 3, 2013 Abandoned
Array ( [id] => 10508208 [patent_doc_number] => 09236085 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-12 [patent_title] => 'Method and apparatus for performing a defect process on a data storage device' [patent_app_type] => utility [patent_app_number] => 13/781374 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3373 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13781374 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/781374
Method and apparatus for performing a defect process on a data storage device Feb 27, 2013 Issued
Array ( [id] => 10065035 [patent_doc_number] => 09103879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-11 [patent_title] => 'Test coverage of integrated circuits with test vector input spreading' [patent_app_type] => utility [patent_app_number] => 13/778812 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5123 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13778812 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/778812
Test coverage of integrated circuits with test vector input spreading Feb 26, 2013 Issued
Array ( [id] => 10093752 [patent_doc_number] => 09130589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Low density parity check decoder with dynamic scaling' [patent_app_type] => utility [patent_app_number] => 13/777841 [patent_app_country] => US [patent_app_date] => 2013-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777841 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/777841
Low density parity check decoder with dynamic scaling Feb 25, 2013 Issued
Array ( [id] => 9014340 [patent_doc_number] => 20130229304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'RECEIVING METHOD AND RECEIVING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/776531 [patent_app_country] => US [patent_app_date] => 2013-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8946 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13776531 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/776531
Receiving method and receiving apparatus Feb 24, 2013 Issued
Array ( [id] => 10907553 [patent_doc_number] => 20140310568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-16 [patent_title] => 'RECEIVER, COMMUNICATION DEVICE, AND COMMUNICATION METHOD' [patent_app_type] => utility [patent_app_number] => 14/359402 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7206 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14359402 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/359402
RECEIVER, COMMUNICATION DEVICE, AND COMMUNICATION METHOD Jan 14, 2013 Abandoned
Array ( [id] => 10074160 [patent_doc_number] => 09112533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Encoding method, decoding method, encoding device, and decoding device' [patent_app_type] => utility [patent_app_number] => 13/723031 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 10196 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13723031 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/723031
Encoding method, decoding method, encoding device, and decoding device Dec 19, 2012 Issued
Array ( [id] => 9548733 [patent_doc_number] => 20140173381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'BIT ERROR DETECTION AND CORRECTION WITH ERROR DETECTION CODE AND LIST-NPMLD' [patent_app_type] => utility [patent_app_number] => 13/719777 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8781 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719777 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/719777
BIT ERROR DETECTION AND CORRECTION WITH ERROR DETECTION CODE AND LIST-NPMLD Dec 18, 2012 Abandoned
Array ( [id] => 9548719 [patent_doc_number] => 20140173367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'SYSTEMS AND METHODS FOR DIFFERENTIAL PAIR IN-PAIR SKEW DETERMINATION AND COMPENSATION' [patent_app_type] => utility [patent_app_number] => 13/720283 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3519 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720283 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/720283
Systems and methods for differential pair in-pair skew determination and compensation Dec 18, 2012 Issued
Array ( [id] => 10501403 [patent_doc_number] => 09229803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Dirty cacheline duplication' [patent_app_type] => utility [patent_app_number] => 13/720536 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720536 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/720536
Dirty cacheline duplication Dec 18, 2012 Issued
Array ( [id] => 9207724 [patent_doc_number] => 20140006901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/720530 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3437 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720530 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/720530
MEMORY SYSTEM Dec 18, 2012 Abandoned
Array ( [id] => 9341593 [patent_doc_number] => 20140068377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/719212 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4220 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/719212
Semiconductor memory device and method of operating the same Dec 17, 2012 Issued
Array ( [id] => 10085277 [patent_doc_number] => 09122625 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-01 [patent_title] => 'Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems' [patent_app_type] => utility [patent_app_number] => 13/718289 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718289 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/718289
Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems Dec 17, 2012 Issued
Array ( [id] => 9264907 [patent_doc_number] => 20130346836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/716342 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6348 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716342 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/716342
Memory device Dec 16, 2012 Issued
Array ( [id] => 9886051 [patent_doc_number] => 08972837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Read/write operations in solid-state storage devices' [patent_app_type] => utility [patent_app_number] => 13/716661 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9967 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716661 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/716661
Read/write operations in solid-state storage devices Dec 16, 2012 Issued
Array ( [id] => 10403377 [patent_doc_number] => 20150288387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'METHODS AND APPARATUS FOR DECODING' [patent_app_type] => utility [patent_app_number] => 14/437575 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7231 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14437575 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/437575
METHODS AND APPARATUS FOR DECODING Dec 13, 2012 Abandoned
Array ( [id] => 8893807 [patent_doc_number] => 20130166991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'Non-Volatile Semiconductor Memory Device Using Mats with Error Detection and Correction and Methods of Managing the Same' [patent_app_type] => utility [patent_app_number] => 13/714729 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6420 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714729 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714729
Non-Volatile Semiconductor Memory Device Using Mats with Error Detection and Correction and Methods of Managing the Same Dec 13, 2012 Abandoned
Array ( [id] => 8918122 [patent_doc_number] => 20130179747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'METHOD AND APPARATUS FOR DATA RECEPTION ERROR RECOVERY IN MOBILE TERMINAL' [patent_app_type] => utility [patent_app_number] => 13/713551 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3893 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13713551 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/713551
METHOD AND APPARATUS FOR DATA RECEPTION ERROR RECOVERY IN MOBILE TERMINAL Dec 12, 2012 Abandoned
Array ( [id] => 11802128 [patent_doc_number] => 09543019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Error corrected pre-read for upper page write in a multi-level cell memory' [patent_app_type] => utility [patent_app_number] => 13/710913 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9153 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710913 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/710913
Error corrected pre-read for upper page write in a multi-level cell memory Dec 10, 2012 Issued
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