Search

John B. Strege

Examiner (ID: 7735, Phone: (571)272-7457 , Office: P/2665 )

Most Active Art Unit
2665
Art Unit(s)
2669, 2665, 2625, 2624
Total Applications
1830
Issued Applications
1504
Pending Applications
144
Abandoned Applications
211

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15516693 [patent_doc_number] => 10564931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-18 [patent_title] => Floating-point arithmetic operation range exception override circuit [patent_app_type] => utility [patent_app_number] => 15/946428 [patent_app_country] => US [patent_app_date] => 2018-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6927 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15946428 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/946428
Floating-point arithmetic operation range exception override circuit Apr 4, 2018 Issued
Array ( [id] => 14704135 [patent_doc_number] => 10379814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Tininess prediction and handler engine for smooth handling of numeric underflow [patent_app_type] => utility [patent_app_number] => 15/934911 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15934911 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/934911
Tininess prediction and handler engine for smooth handling of numeric underflow Mar 22, 2018 Issued
Array ( [id] => 14825101 [patent_doc_number] => 10409557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Signed division in memory [patent_app_type] => utility [patent_app_number] => 15/911668 [patent_app_country] => US [patent_app_date] => 2018-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 43486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15911668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/911668
Signed division in memory Mar 4, 2018 Issued
Array ( [id] => 14825097 [patent_doc_number] => 10409555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Multiplication operations in memory [patent_app_type] => utility [patent_app_number] => 15/905083 [patent_app_country] => US [patent_app_date] => 2018-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 35112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15905083 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/905083
Multiplication operations in memory Feb 25, 2018 Issued
Array ( [id] => 14825095 [patent_doc_number] => 10409554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Multiplication operations in memory [patent_app_type] => utility [patent_app_number] => 15/898894 [patent_app_country] => US [patent_app_date] => 2018-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 30406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898894 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898894
Multiplication operations in memory Feb 18, 2018 Issued
Array ( [id] => 14330553 [patent_doc_number] => 10296294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Multiply-add operations of binary numbers in an arithmetic unit [patent_app_type] => utility [patent_app_number] => 15/897472 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6390 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897472 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897472
Multiply-add operations of binary numbers in an arithmetic unit Feb 14, 2018 Issued
Array ( [id] => 14766257 [patent_doc_number] => 10394524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Arithmetic operation input-output equality detection [patent_app_type] => utility [patent_app_number] => 15/896117 [patent_app_country] => US [patent_app_date] => 2018-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5008 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15896117 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/896117
Arithmetic operation input-output equality detection Feb 13, 2018 Issued
Array ( [id] => 15136813 [patent_doc_number] => 10481873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Random number generation using heat assisted magnetic recording [patent_app_type] => utility [patent_app_number] => 15/884952 [patent_app_country] => US [patent_app_date] => 2018-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 3081 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15884952 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/884952
Random number generation using heat assisted magnetic recording Jan 30, 2018 Issued
Array ( [id] => 15516697 [patent_doc_number] => 10564933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Quantum random number generators [patent_app_type] => utility [patent_app_number] => 15/884871 [patent_app_country] => US [patent_app_date] => 2018-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 14482 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15884871 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/884871
Quantum random number generators Jan 30, 2018 Issued
Array ( [id] => 14860461 [patent_doc_number] => 10418974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Apparatus for modifying a sampling rate system including an apparatus for modifying a sampling rate and method for modifying a sampling rate [patent_app_type] => utility [patent_app_number] => 15/884097 [patent_app_country] => US [patent_app_date] => 2018-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8293 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15884097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/884097
Apparatus for modifying a sampling rate system including an apparatus for modifying a sampling rate and method for modifying a sampling rate Jan 29, 2018 Issued
Array ( [id] => 13350829 [patent_doc_number] => 20180226954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => PARTITIONED BLOCK FREQUENCY DOMAIN ADAPTIVE FILTER DEVICE COMPRISING ADAPTATION MODULES AND CORRECTION MODULES [patent_app_type] => utility [patent_app_number] => 15/878234 [patent_app_country] => US [patent_app_date] => 2018-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15878234 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/878234
Partitioned block frequency domain adaptive filter device comprising adaptation modules and correction modules Jan 22, 2018 Issued
Array ( [id] => 13304569 [patent_doc_number] => 20180203821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => CALCULATOR, METHOD OF REGISTERING OPERAND IN CALCULATOR, AND COMPUTER-READABLE NON-TRANSITORY STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 15/874563 [patent_app_country] => US [patent_app_date] => 2018-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874563 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874563
Calculator, method of registering operand in calculator, and computer-readable non-transitory storage medium Jan 17, 2018 Issued
Array ( [id] => 15167969 [patent_doc_number] => 10489480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Sparse matrix multiplication in associative memory device [patent_app_type] => utility [patent_app_number] => 15/873002 [patent_app_country] => US [patent_app_date] => 2018-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 43 [patent_no_of_words] => 5141 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15873002 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/873002
Sparse matrix multiplication in associative memory device Jan 16, 2018 Issued
Array ( [id] => 14585779 [patent_doc_number] => 20190220498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => DIGITAL SIGNAL PROCESSING SYSTEM AND DESIGN METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/871100 [patent_app_country] => US [patent_app_date] => 2018-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/871100
DIGITAL SIGNAL PROCESSING SYSTEM AND DESIGN METHOD THEREOF Jan 14, 2018 Abandoned
Array ( [id] => 15399525 [patent_doc_number] => 10540420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Accelerator for matrix decomposition [patent_app_type] => utility [patent_app_number] => 15/858788 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 21278 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858788 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858788
Accelerator for matrix decomposition Dec 28, 2017 Issued
Array ( [id] => 15106211 [patent_doc_number] => 10474430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Mixed-precision processing elements, systems, and methods for computational models [patent_app_type] => utility [patent_app_number] => 15/857998 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8789 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857998 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857998
Mixed-precision processing elements, systems, and methods for computational models Dec 28, 2017 Issued
Array ( [id] => 13830339 [patent_doc_number] => 20190018654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT [patent_app_type] => utility [patent_app_number] => 15/856255 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15856255 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/856255
Multiply-add operations of binary numbers in an arithmetic unit Dec 27, 2017 Issued
Array ( [id] => 13332557 [patent_doc_number] => 20180217816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => INTERNET-ENABLED AUDIO-VISUAL GRAPHING CALCULATOR [patent_app_type] => utility [patent_app_number] => 15/852688 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852688 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/852688
Internet-enabled audio-visual graphing calculator Dec 21, 2017 Issued
Array ( [id] => 12869080 [patent_doc_number] => 20180181535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => CALCULATING DEVICE, CALCULATING METHOD, AND COMPUTER READABLE RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 15/852969 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/852969
Calculating device, calculating method, and computer readable recording medium Dec 21, 2017 Issued
Array ( [id] => 13556277 [patent_doc_number] => 20180329686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => OPTIMIZED INTEGER DIVISION CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/816403 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816403
OPTIMIZED INTEGER DIVISION CIRCUIT Nov 16, 2017 Abandoned
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