
John B. Vigushin
Examiner (ID: 6446)
| Most Active Art Unit | 2841 |
| Art Unit(s) | 2827, 2103, 2835, 2841, 3662 |
| Total Applications | 656 |
| Issued Applications | 594 |
| Pending Applications | 37 |
| Abandoned Applications | 25 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16425297
[patent_doc_number] => 20200350495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-05
[patent_title] => MRAM DEVICE FORMATION WITH IN-SITU ENCAPSULATION
[patent_app_type] => utility
[patent_app_number] => 16/402126
[patent_app_country] => US
[patent_app_date] => 2019-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4974
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402126
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/402126 | MRAM device formation with in-situ encapsulation | May 1, 2019 | Issued |
Array
(
[id] => 16637968
[patent_doc_number] => 10916483
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-09
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/391815
[patent_app_country] => US
[patent_app_date] => 2019-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 5826
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391815
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/391815 | Semiconductor device | Apr 22, 2019 | Issued |
Array
(
[id] => 14691747
[patent_doc_number] => 20190244989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-08
[patent_title] => BACK-SIDE ILLUMINATED IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 16/386826
[patent_app_country] => US
[patent_app_date] => 2019-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2857
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16386826
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/386826 | Back-side illuminated image sensor | Apr 16, 2019 | Issued |
Array
(
[id] => 14691409
[patent_doc_number] => 20190244820
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-08
[patent_title] => SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/383082
[patent_app_country] => US
[patent_app_date] => 2019-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22063
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383082
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/383082 | Semiconductor device having buried gate structure and method for fabricating the same | Apr 11, 2019 | Issued |
Array
(
[id] => 17381293
[patent_doc_number] => 11239326
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-01
[patent_title] => Electrode structure for field effect transistor
[patent_app_type] => utility
[patent_app_number] => 16/381485
[patent_app_country] => US
[patent_app_date] => 2019-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 55
[patent_figures_cnt] => 69
[patent_no_of_words] => 10146
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16381485
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/381485 | Electrode structure for field effect transistor | Apr 10, 2019 | Issued |
Array
(
[id] => 14676691
[patent_doc_number] => 20190237460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => METHOD OF FABRICATING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/380953
[patent_app_country] => US
[patent_app_date] => 2019-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3842
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380953
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/380953 | Method of fabricating semiconductor device | Apr 9, 2019 | Issued |
Array
(
[id] => 15857639
[patent_doc_number] => 10644121
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-05
[patent_title] => Semiconductor die having stacking structure of silicon-metallic conductive layer-silicon
[patent_app_type] => utility
[patent_app_number] => 16/294338
[patent_app_country] => US
[patent_app_date] => 2019-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 6828
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294338
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/294338 | Semiconductor die having stacking structure of silicon-metallic conductive layer-silicon | Mar 5, 2019 | Issued |
Array
(
[id] => 14475957
[patent_doc_number] => 20190189627
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-20
[patent_title] => FERROELECTRIC MEMORY CELLS INCLUDING FERROELECTRIC CRYSTALLINE MATERIALS HAVING POLAR AND CHIRAL CRYSTAL STRUCTURES, AND RELATED MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/284946
[patent_app_country] => US
[patent_app_date] => 2019-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6047
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284946
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/284946 | FERROELECTRIC MEMORY CELLS INCLUDING FERROELECTRIC CRYSTALLINE MATERIALS HAVING POLAR AND CHIRAL CRYSTAL STRUCTURES, AND RELATED MEMORY DEVICES | Feb 24, 2019 | Abandoned |
Array
(
[id] => 16471926
[patent_doc_number] => 20200373464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => GRAPHENE BASED CONTACT LAYERS FOR ELECTRONIC DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/961059
[patent_app_country] => US
[patent_app_date] => 2019-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7033
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16961059
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/961059 | GRAPHENE BASED CONTACT LAYERS FOR ELECTRONIC DEVICES | Jan 9, 2019 | Abandoned |
Array
(
[id] => 15969741
[patent_doc_number] => 20200168622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-28
[patent_title] => Memory Arrays And Methods Used In Forming A Memory Array
[patent_app_type] => utility
[patent_app_number] => 16/200158
[patent_app_country] => US
[patent_app_date] => 2018-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8352
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -32
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200158
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/200158 | Memory arrays and methods used in forming a memory array | Nov 25, 2018 | Issued |
Array
(
[id] => 16502782
[patent_doc_number] => 10868184
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-15
[patent_title] => Fin field effect transistor (FinFET) device structure with hard mask layer over gate structure and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 16/199906
[patent_app_country] => US
[patent_app_date] => 2018-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6892
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199906
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/199906 | Fin field effect transistor (FinFET) device structure with hard mask layer over gate structure and method for forming the same | Nov 25, 2018 | Issued |
Array
(
[id] => 15969735
[patent_doc_number] => 20200168619
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-28
[patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING REPLACEMENT CRYSTALLINE CHANNELS AND METHODS OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/200115
[patent_app_country] => US
[patent_app_date] => 2018-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19388
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200115
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/200115 | Three-dimensional memory device including replacement crystalline channels and methods of making the same | Nov 25, 2018 | Issued |
Array
(
[id] => 14381933
[patent_doc_number] => 20190164879
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-30
[patent_title] => WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/199465
[patent_app_country] => US
[patent_app_date] => 2018-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5175
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199465
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/199465 | Wiring substrate and semiconductor device | Nov 25, 2018 | Issued |
Array
(
[id] => 14382121
[patent_doc_number] => 20190164973
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-30
[patent_title] => MEMORY ARRAY COMPRISING MEMORY CELLS OF Z2-FET TYPE
[patent_app_type] => utility
[patent_app_number] => 16/199810
[patent_app_country] => US
[patent_app_date] => 2018-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4409
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199810
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/199810 | Memory array comprising memory cells of Z2-FET type | Nov 25, 2018 | Issued |
Array
(
[id] => 19553893
[patent_doc_number] => 12137616
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-05
[patent_title] => Magnetoresistive stack/structure and methods therefor
[patent_app_type] => utility
[patent_app_number] => 16/190299
[patent_app_country] => US
[patent_app_date] => 2018-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 12295
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190299
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/190299 | Magnetoresistive stack/structure and methods therefor | Nov 13, 2018 | Issued |
Array
(
[id] => 14813187
[patent_doc_number] => 20190273203
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-05
[patent_title] => MAGNETORESISTIVE EFFECT ELEMENT
[patent_app_type] => utility
[patent_app_number] => 16/190695
[patent_app_country] => US
[patent_app_date] => 2018-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10922
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190695
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/190695 | MAGNETORESISTIVE EFFECT ELEMENT | Nov 13, 2018 | Abandoned |
Array
(
[id] => 16410206
[patent_doc_number] => 10818775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-27
[patent_title] => Method for fabricating a field-effect transistor
[patent_app_type] => utility
[patent_app_number] => 16/190747
[patent_app_country] => US
[patent_app_date] => 2018-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 19
[patent_no_of_words] => 12792
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190747
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/190747 | Method for fabricating a field-effect transistor | Nov 13, 2018 | Issued |
Array
(
[id] => 14938915
[patent_doc_number] => 20190305096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/189563
[patent_app_country] => US
[patent_app_date] => 2018-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16189563
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/189563 | Semiconductor device and manufacturing method of semiconductor device | Nov 12, 2018 | Issued |
Array
(
[id] => 14938915
[patent_doc_number] => 20190305096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/189563
[patent_app_country] => US
[patent_app_date] => 2018-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16189563
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/189563 | Semiconductor device and manufacturing method of semiconductor device | Nov 12, 2018 | Issued |
Array
(
[id] => 15026649
[patent_doc_number] => 20190324329
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/189607
[patent_app_country] => US
[patent_app_date] => 2018-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8265
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16189607
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/189607 | DISPLAY DEVICE | Nov 12, 2018 | Abandoned |