Search

John B. Vigushin

Examiner (ID: 4424)

Most Active Art Unit
2841
Art Unit(s)
2841, 2103, 2827, 2835, 3662
Total Applications
656
Issued Applications
594
Pending Applications
37
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 623874 [patent_doc_number] => 07138583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Method and apparatus for maintaining a separation between contacts' [patent_app_type] => utility [patent_app_number] => 10/142213 [patent_app_country] => US [patent_app_date] => 2002-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 7032 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/138/07138583.pdf [firstpage_image] =>[orig_patent_app_number] => 10142213 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/142213
Method and apparatus for maintaining a separation between contacts May 7, 2002 Issued
Array ( [id] => 7296415 [patent_doc_number] => 20040214364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Method and semi-product for producing a chip card with a coil' [patent_app_type] => new [patent_app_number] => 10/477138 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1609 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20040214364.pdf [firstpage_image] =>[orig_patent_app_number] => 10477138 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/477138
Method and semi-product for producing a chip card with a coil May 6, 2002 Issued
Array ( [id] => 6395279 [patent_doc_number] => 20020181216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Electronic module having a three dimensional array of carrier-mounted integrated circuit packages' [patent_app_type] => new [patent_app_number] => 10/139597 [patent_app_country] => US [patent_app_date] => 2002-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4231 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181216.pdf [firstpage_image] =>[orig_patent_app_number] => 10139597 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/139597
Electronic module having a three dimensional array of carrier-mounted integrated circuit packages May 5, 2002 Issued
Array ( [id] => 1219867 [patent_doc_number] => 06707685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Multi-layer wiring board' [patent_app_type] => B2 [patent_app_number] => 10/132685 [patent_app_country] => US [patent_app_date] => 2002-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 17104 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707685.pdf [firstpage_image] =>[orig_patent_app_number] => 10132685 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/132685
Multi-layer wiring board Apr 24, 2002 Issued
Array ( [id] => 6509235 [patent_doc_number] => 20020135274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Outer coating substrate for electronic component and piezoelectric resonant component' [patent_app_type] => new [patent_app_number] => 10/127472 [patent_app_country] => US [patent_app_date] => 2002-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11574 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20020135274.pdf [firstpage_image] =>[orig_patent_app_number] => 10127472 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/127472
Outer coating substrate for electronic component and piezoelectric resonant component Apr 22, 2002 Issued
Array ( [id] => 1409614 [patent_doc_number] => 06545876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Technique for reducing the number of layers in a multilayer circuit board' [patent_app_type] => B1 [patent_app_number] => 10/126700 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6067 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/545/06545876.pdf [firstpage_image] =>[orig_patent_app_number] => 10126700 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126700
Technique for reducing the number of layers in a multilayer circuit board Apr 21, 2002 Issued
Array ( [id] => 7611900 [patent_doc_number] => 06903939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-07 [patent_title] => 'Physical architecture for design of high density metallic cross connect systems' [patent_app_type] => utility [patent_app_number] => 10/126281 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 2706 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903939.pdf [firstpage_image] =>[orig_patent_app_number] => 10126281 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126281
Physical architecture for design of high density metallic cross connect systems Apr 18, 2002 Issued
Array ( [id] => 7610511 [patent_doc_number] => 06842347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Data processing system and associated control chip and printed circuit board' [patent_app_type] => utility [patent_app_number] => 10/127044 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3058 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842347.pdf [firstpage_image] =>[orig_patent_app_number] => 10127044 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/127044
Data processing system and associated control chip and printed circuit board Apr 18, 2002 Issued
Array ( [id] => 6454635 [patent_doc_number] => 20020149921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Construction and method for interconnecting flexible printed circuit and wiring board, liquid crystal display device, and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/123586 [patent_app_country] => US [patent_app_date] => 2002-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8680 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149921.pdf [firstpage_image] =>[orig_patent_app_number] => 10123586 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/123586
Construction and method for interconnecting flexible printed circuit and wiring board, liquid crystal display device, and method for manufacturing the same Apr 15, 2002 Issued
Array ( [id] => 1127799 [patent_doc_number] => 06791035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Interposer to couple a microelectronic device package to a circuit board' [patent_app_type] => B2 [patent_app_number] => 10/080438 [patent_app_country] => US [patent_app_date] => 2002-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 3214 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791035.pdf [firstpage_image] =>[orig_patent_app_number] => 10080438 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/080438
Interposer to couple a microelectronic device package to a circuit board Feb 20, 2002 Issued
Array ( [id] => 6703908 [patent_doc_number] => 20030150642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Electromagnetic bus coupling' [patent_app_type] => new [patent_app_number] => 10/077593 [patent_app_country] => US [patent_app_date] => 2002-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3485 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20030150642.pdf [firstpage_image] =>[orig_patent_app_number] => 10077593 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/077593
Electromagnetic bus coupling Feb 13, 2002 Issued
Array ( [id] => 1153332 [patent_doc_number] => 06770969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'High performance capacitor' [patent_app_type] => B2 [patent_app_number] => 10/075659 [patent_app_country] => US [patent_app_date] => 2002-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 0 [patent_no_of_words] => 2472 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/770/06770969.pdf [firstpage_image] =>[orig_patent_app_number] => 10075659 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/075659
High performance capacitor Feb 12, 2002 Issued
Array ( [id] => 6841879 [patent_doc_number] => 20030147226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Method and structure for reduction of impedance using decoupling capacitor' [patent_app_type] => new [patent_app_number] => 10/072684 [patent_app_country] => US [patent_app_date] => 2002-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2498 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20030147226.pdf [firstpage_image] =>[orig_patent_app_number] => 10072684 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/072684
Method and structure for reduction of impedance using decoupling capacitor Feb 6, 2002 Issued
Array ( [id] => 6643633 [patent_doc_number] => 20030007339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Stacked backplane assembly' [patent_app_type] => new [patent_app_number] => 10/062780 [patent_app_country] => US [patent_app_date] => 2002-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3244 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20030007339.pdf [firstpage_image] =>[orig_patent_app_number] => 10062780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/062780
Stacked backplane assembly Feb 4, 2002 Issued
Array ( [id] => 1268799 [patent_doc_number] => 06661675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Device and bridge card for a computer' [patent_app_type] => B2 [patent_app_number] => 10/048262 [patent_app_country] => US [patent_app_date] => 2002-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2435 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661675.pdf [firstpage_image] =>[orig_patent_app_number] => 10048262 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/048262
Device and bridge card for a computer Jan 27, 2002 Issued
Array ( [id] => 6786578 [patent_doc_number] => 20030137817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other' [patent_app_type] => new [patent_app_number] => 10/051703 [patent_app_country] => US [patent_app_date] => 2002-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20030137817.pdf [firstpage_image] =>[orig_patent_app_number] => 10051703 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051703
Electrical connection system for two printed circuit boards mounted on opposite sides of a mid-plane printed circuit board at angles to each other Jan 17, 2002 Issued
Array ( [id] => 1051612 [patent_doc_number] => 06862190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Adapter for plastic-leaded chip carrier (PLCC) and other surface mount technology (SMT) chip carriers' [patent_app_type] => utility [patent_app_number] => 10/052715 [patent_app_country] => US [patent_app_date] => 2002-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3572 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862190.pdf [firstpage_image] =>[orig_patent_app_number] => 10052715 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/052715
Adapter for plastic-leaded chip carrier (PLCC) and other surface mount technology (SMT) chip carriers Jan 16, 2002 Issued
Array ( [id] => 5919715 [patent_doc_number] => 20020114144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Molded flip chip package' [patent_app_type] => new [patent_app_number] => 10/051980 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2539 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20020114144.pdf [firstpage_image] =>[orig_patent_app_number] => 10051980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051980
Molded flip chip package Jan 15, 2002 Abandoned
Array ( [id] => 1106297 [patent_doc_number] => 06812566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Lower profile package with power supply in package' [patent_app_type] => B2 [patent_app_number] => 10/039131 [patent_app_country] => US [patent_app_date] => 2002-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1089 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812566.pdf [firstpage_image] =>[orig_patent_app_number] => 10039131 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039131
Lower profile package with power supply in package Jan 1, 2002 Issued
Array ( [id] => 6759870 [patent_doc_number] => 20030123231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Dual interposer packaging for high density interconnect' [patent_app_type] => new [patent_app_number] => 10/033990 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2982 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20030123231.pdf [firstpage_image] =>[orig_patent_app_number] => 10033990 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/033990
Dual interposer packaging for high density interconnect Dec 27, 2001 Issued
Menu