Search

John C. Ingham

Examiner (ID: 4266, Phone: (571)272-8793 , Office: P/2819 )

Most Active Art Unit
2814
Art Unit(s)
2897, 2819, 2814
Total Applications
619
Issued Applications
473
Pending Applications
3
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 178318 [patent_doc_number] => 07656027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'In-chip structures and methods for removing heat from integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/443669 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 7733 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656027.pdf [firstpage_image] =>[orig_patent_app_number] => 11443669 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/443669
In-chip structures and methods for removing heat from integrated circuits May 29, 2006 Issued
Array ( [id] => 5605631 [patent_doc_number] => 20060267147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Semiconductor device having current mirror circuit' [patent_app_type] => utility [patent_app_number] => 11/442399 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3117 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20060267147.pdf [firstpage_image] =>[orig_patent_app_number] => 11442399 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/442399
Semiconductor device having current mirror circuit May 29, 2006 Abandoned
Array ( [id] => 55043 [patent_doc_number] => 07768113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'Stackable tier structure comprising prefabricated high density feedthrough' [patent_app_type] => utility [patent_app_number] => 11/441908 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 34 [patent_no_of_words] => 3754 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/768/07768113.pdf [firstpage_image] =>[orig_patent_app_number] => 11441908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/441908
Stackable tier structure comprising prefabricated high density feedthrough May 25, 2006 Issued
Array ( [id] => 5884173 [patent_doc_number] => 20060273348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Transistor and display and method of driving the same' [patent_app_type] => utility [patent_app_number] => 11/441028 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20060273348.pdf [firstpage_image] =>[orig_patent_app_number] => 11441028 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/441028
Transistor and display and method of driving the same May 25, 2006 Issued
Array ( [id] => 5688388 [patent_doc_number] => 20060286703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Thin film transistor array panel and liquid crystal display including the same' [patent_app_type] => utility [patent_app_number] => 11/440789 [patent_app_country] => US [patent_app_date] => 2006-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20060286703.pdf [firstpage_image] =>[orig_patent_app_number] => 11440789 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440789
Thin film transistor array panel and liquid crystal display including the same May 24, 2006 Abandoned
Array ( [id] => 274195 [patent_doc_number] => 07560359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-14 [patent_title] => 'Methods of forming asymmetric recesses and gate structures that fill such recesses and related methods of forming semiconductor devices that include such recesses and gate structures' [patent_app_type] => utility [patent_app_number] => 11/440183 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 14341 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/560/07560359.pdf [firstpage_image] =>[orig_patent_app_number] => 11440183 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440183
Methods of forming asymmetric recesses and gate structures that fill such recesses and related methods of forming semiconductor devices that include such recesses and gate structures May 23, 2006 Issued
Array ( [id] => 5697512 [patent_doc_number] => 20060214196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor devices having a hybrid channel layer, current aperture transistors and methods of fabricating same' [patent_app_type] => utility [patent_app_number] => 11/436745 [patent_app_country] => US [patent_app_date] => 2006-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10617 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214196.pdf [firstpage_image] =>[orig_patent_app_number] => 11436745 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/436745
Semiconductor devices having a hybrid channel layer, current aperture transistors and methods of fabricating same May 17, 2006 Abandoned
Array ( [id] => 585976 [patent_doc_number] => 07449746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'EEPROM with split gate source side injection' [patent_app_type] => utility [patent_app_number] => 11/278778 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 39 [patent_no_of_words] => 14184 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/449/07449746.pdf [firstpage_image] =>[orig_patent_app_number] => 11278778 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/278778
EEPROM with split gate source side injection Apr 4, 2006 Issued
Array ( [id] => 5593815 [patent_doc_number] => 20060157731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Method of providing a CMOS output stage utilizing a buried power buss' [patent_app_type] => utility [patent_app_number] => 11/385419 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3383 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20060157731.pdf [firstpage_image] =>[orig_patent_app_number] => 11385419 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385419
Method of providing a CMOS output stage utilizing a buried power buss Mar 20, 2006 Abandoned
Array ( [id] => 7601464 [patent_doc_number] => 07385240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'Storage cell capacitor compatible with high dielectric constant materials' [patent_app_type] => utility [patent_app_number] => 11/276639 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 9422 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/385/07385240.pdf [firstpage_image] =>[orig_patent_app_number] => 11276639 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/276639
Storage cell capacitor compatible with high dielectric constant materials Mar 7, 2006 Issued
Array ( [id] => 914410 [patent_doc_number] => 07326656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Method of forming a metal oxide dielectric' [patent_app_type] => utility [patent_app_number] => 11/362453 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 16982 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/326/07326656.pdf [firstpage_image] =>[orig_patent_app_number] => 11362453 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/362453
Method of forming a metal oxide dielectric Feb 23, 2006 Issued
Array ( [id] => 8446782 [patent_doc_number] => 08288837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Semiconductor radiation detector optimized for detecting visible light' [patent_app_type] => utility [patent_app_number] => 12/087359 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 69 [patent_no_of_words] => 12099 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12087359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/087359
Semiconductor radiation detector optimized for detecting visible light Feb 16, 2006 Issued
Array ( [id] => 592645 [patent_doc_number] => 07436017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Semiconductor integrated circuit using a selective disposable spacer' [patent_app_type] => utility [patent_app_number] => 11/331659 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 53 [patent_no_of_words] => 7291 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/436/07436017.pdf [firstpage_image] =>[orig_patent_app_number] => 11331659 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/331659
Semiconductor integrated circuit using a selective disposable spacer Jan 11, 2006 Issued
Array ( [id] => 5823799 [patent_doc_number] => 20060060981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Production methods for a leadframe and electronic devices' [patent_app_type] => utility [patent_app_number] => 11/274249 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7070 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20060060981.pdf [firstpage_image] =>[orig_patent_app_number] => 11274249 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/274249
Production methods for a leadframe and electronic devices Nov 14, 2005 Abandoned
Array ( [id] => 160113 [patent_doc_number] => 07675123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Printable non-volatile passive memory element and method of making thereof' [patent_app_type] => utility [patent_app_number] => 11/259859 [patent_app_country] => US [patent_app_date] => 2005-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 11875 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/675/07675123.pdf [firstpage_image] =>[orig_patent_app_number] => 11259859 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/259859
Printable non-volatile passive memory element and method of making thereof Oct 26, 2005 Issued
Array ( [id] => 807173 [patent_doc_number] => 07420219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-02 [patent_title] => 'White light emitting diode component having two phosphors and related phosphor and formation method' [patent_app_type] => utility [patent_app_number] => 11/162908 [patent_app_country] => US [patent_app_date] => 2005-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3107 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/420/07420219.pdf [firstpage_image] =>[orig_patent_app_number] => 11162908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162908
White light emitting diode component having two phosphors and related phosphor and formation method Sep 27, 2005 Issued
Array ( [id] => 5743230 [patent_doc_number] => 20060088955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'CHIP PACKAGE, CHIP PACKAGING, CHIP CARRIER AND PROCESS THEREOF' [patent_app_type] => utility [patent_app_number] => 11/162898 [patent_app_country] => US [patent_app_date] => 2005-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5005 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20060088955.pdf [firstpage_image] =>[orig_patent_app_number] => 11162898 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162898
Chip package, chip packaging, chip carrier and process thereof Sep 26, 2005 Issued
Array ( [id] => 5774111 [patent_doc_number] => 20060103008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/162828 [patent_app_country] => US [patent_app_date] => 2005-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3746 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20060103008.pdf [firstpage_image] =>[orig_patent_app_number] => 11162828 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162828
HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM Sep 23, 2005 Abandoned
Array ( [id] => 5828273 [patent_doc_number] => 20060063305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'PROCESS OF FABRICATING FLIP-CHIP PACKAGES' [patent_app_type] => utility [patent_app_number] => 11/162789 [patent_app_country] => US [patent_app_date] => 2005-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1951 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20060063305.pdf [firstpage_image] =>[orig_patent_app_number] => 11162789 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162789
PROCESS OF FABRICATING FLIP-CHIP PACKAGES Sep 21, 2005 Abandoned
Array ( [id] => 5104435 [patent_doc_number] => 20070063310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'A metal fuse for semiconductor devices and methods of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 11/162669 [patent_app_country] => US [patent_app_date] => 2005-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2591 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063310.pdf [firstpage_image] =>[orig_patent_app_number] => 11162669 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162669
A metal fuse for semiconductor devices and methods of manufacturing thereof Sep 18, 2005 Abandoned
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