John C. Ingham

Array ( [id] => 5104456 [patent_doc_number] => 20070063331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PLANAR INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 11/162629 [patent_app_country] => US [patent_app_date] => 2005-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063331.pdf [firstpage_image] =>[orig_patent_app_number] => 11162629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5180614 [patent_doc_number] => 20070051956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/162159 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20070051956.pdf [firstpage_image] =>[orig_patent_app_number] => 11162159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6975557 [patent_doc_number] => 20050285272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Conductive structures in integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/216693 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4186 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285272.pdf [firstpage_image] =>[orig_patent_app_number] => 11216693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 349136 [patent_doc_number] => 07495254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 11/162128 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/495/07495254.pdf [firstpage_image] =>[orig_patent_app_number] => 11162128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5180711 [patent_doc_number] => 20070052053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'COMPLEMENTARY METAL OXIDE SEMICONDUCTOR IMAGE SENSOR AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/162118 [patent_app_country] => US [patent_app_date] => 2005-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5679 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20070052053.pdf [firstpage_image] =>[orig_patent_app_number] => 11162118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5152018 [patent_doc_number] => 20070034900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'BIPOLAR JUNCTION TRANSISTOR AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/161619 [patent_app_country] => US [patent_app_date] => 2005-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3685 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20070034900.pdf [firstpage_image] =>[orig_patent_app_number] => 11161619 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5202360 [patent_doc_number] => 20070023839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'FINFET GATE FORMED OF CARBON NANOTUBES' [patent_app_type] => utility [patent_app_number] => 11/161219 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 4089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20070023839.pdf [firstpage_image] =>[orig_patent_app_number] => 11161219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 820899 [patent_doc_number] => 07408233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Semiconductor device having N-channel thin film transistor with LDD regions and P-channel thin film transistor with LDD region' [patent_app_type] => utility [patent_app_number] => 11/178308 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 42 [patent_no_of_words] => 8081 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408233.pdf [firstpage_image] =>[orig_patent_app_number] => 11178308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6963824 [patent_doc_number] => 20050230721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'CMOS imager with enhanced transfer of charge and low voltage operation and method of formation' [patent_app_type] => utility [patent_app_number] => 11/158045 [patent_app_country] => US [patent_app_date] => 2005-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7643 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20050230721.pdf [firstpage_image] =>[orig_patent_app_number] => 11158045 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 292678 [patent_doc_number] => 07544972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Organic electroluminescent display device and method of preparing the same' [patent_app_type] => utility [patent_app_number] => 11/149237 [patent_app_country] => US [patent_app_date] => 2005-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5016 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/544/07544972.pdf [firstpage_image] =>[orig_patent_app_number] => 11149237 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6949746 [patent_doc_number] => 20050224840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Dual-oxide transistors for the improvement of reliability and off-state leakage' [patent_app_type] => utility [patent_app_number] => 11/149049 [patent_app_country] => US [patent_app_date] => 2005-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224840.pdf [firstpage_image] =>[orig_patent_app_number] => 11149049 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5771126 [patent_doc_number] => 20050266668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/137537 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20050266668.pdf [firstpage_image] =>[orig_patent_app_number] => 11137537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 568404 [patent_doc_number] => 07462553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-09 [patent_title] => 'Ultra thin back-illuminated photodiode array fabrication methods' [patent_app_type] => utility [patent_app_number] => 11/136281 [patent_app_country] => US [patent_app_date] => 2005-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2356 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/462/07462553.pdf [firstpage_image] =>[orig_patent_app_number] => 11136281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7016459 [patent_doc_number] => 20050218476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Integrated process for fuse opening and passivation process for Cu/Low-K IMD' [patent_app_type] => utility [patent_app_number] => 11/132086 [patent_app_country] => US [patent_app_date] => 2005-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6617 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20050218476.pdf [firstpage_image] =>[orig_patent_app_number] => 11132086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7111297 [patent_doc_number] => 20050208753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Dual-damascene interconnects without an etch stop layer by alternating ILDs' [patent_app_type] => utility [patent_app_number] => 11/131740 [patent_app_country] => US [patent_app_date] => 2005-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1694 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20050208753.pdf [firstpage_image] =>[orig_patent_app_number] => 11131740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7111302 [patent_doc_number] => 20050208758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Dielectric barrier films for use as copper barrier layers in semiconductor trench and via structures' [patent_app_type] => utility [patent_app_number] => 11/131003 [patent_app_country] => US [patent_app_date] => 2005-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5742 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20050208758.pdf [firstpage_image] =>[orig_patent_app_number] => 11131003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5659209 [patent_doc_number] => 20060249805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Shielding Layer outside the Pixel Regions of Optical Device and Method for Making the Same' [patent_app_type] => utility [patent_app_number] => 10/908219 [patent_app_country] => US [patent_app_date] => 2005-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2342 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20060249805.pdf [firstpage_image] =>[orig_patent_app_number] => 10908219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6943530 [patent_doc_number] => 20050195579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Apparatus and method for improving AC coupling on circuit boards' [patent_app_type] => utility [patent_app_number] => 11/120393 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2659 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20050195579.pdf [firstpage_image] =>[orig_patent_app_number] => 11120393 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7213791 [patent_doc_number] => 20050253155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Optoelectronic semiconductor chip and method for forming a contact structure for making electrical contact with an optoelectronic semiconductor chip' [patent_app_type] => utility [patent_app_number] => 11/118149 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7496 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253155.pdf [firstpage_image] =>[orig_patent_app_number] => 11118149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5854590 [patent_doc_number] => 20060226523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Organic electronic devices having external barrier layer' [patent_app_type] => utility [patent_app_number] => 11/095199 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7353 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226523.pdf [firstpage_image] =>[orig_patent_app_number] => 11095199 [rel_patent_id] =>[rel_patent_doc_number] =>)