Search

John C. Loomis

Examiner (ID: 4758)

Most Active Art Unit
2307
Art Unit(s)
2307, 2171, 2771
Total Applications
312
Issued Applications
244
Pending Applications
8
Abandoned Applications
60

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15823521 [patent_doc_number] => 10636961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Semiconductor structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 15/834726 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834726 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834726
Semiconductor structure and method of forming the same Dec 6, 2017 Issued
Array ( [id] => 16132367 [patent_doc_number] => 10699951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Self-aligned low dielectric constant gate cap and a method of forming the same [patent_app_type] => utility [patent_app_number] => 15/825573 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3700 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15825573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/825573
Self-aligned low dielectric constant gate cap and a method of forming the same Nov 28, 2017 Issued
Array ( [id] => 12243421 [patent_doc_number] => 20180076284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/818403 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5083 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818403
Semiconductor device, related manufacturing method, and related electronic device Nov 19, 2017 Issued
Array ( [id] => 12236158 [patent_doc_number] => 20180069021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/812404 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10467 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15812404 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/812404
Semiconductor device and method of manufacturing the same Nov 13, 2017 Issued
Array ( [id] => 12236214 [patent_doc_number] => 20180069077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/808029 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15430 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808029 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808029
Power device integration on a common substrate Nov 8, 2017 Issued
Array ( [id] => 12221629 [patent_doc_number] => 20180059989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'IMAGE PROCESSING SEMICONDUCTOR DEVICE AND IMAGE PROCESSING DEVICE' [patent_app_type] => utility [patent_app_number] => 15/806182 [patent_app_country] => US [patent_app_date] => 2017-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6134 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15806182 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/806182
Image processing semiconductor device and image processing device Nov 6, 2017 Issued
Array ( [id] => 12208556 [patent_doc_number] => 20180053782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING 3-DIMENSIONAL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/803035 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7143 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15803035 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/803035
Semiconductor memory device including 3-dimensional structure and method for manufacturing the same Nov 2, 2017 Issued
Array ( [id] => 12236181 [patent_doc_number] => 20180069044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/797863 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 95 [patent_figures_cnt] => 95 [patent_no_of_words] => 23164 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15797863 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/797863
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Oct 29, 2017 Abandoned
Array ( [id] => 14859489 [patent_doc_number] => 10418481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Method and structure for reducing switching power losses [patent_app_type] => utility [patent_app_number] => 15/789831 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5650 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15789831 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/789831
Method and structure for reducing switching power losses Oct 19, 2017 Issued
Array ( [id] => 12162433 [patent_doc_number] => 20180033699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/723928 [patent_app_country] => US [patent_app_date] => 2017-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 8276 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15723928 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/723928
Semiconductor arrangement and method for manufacturing the same Oct 2, 2017 Issued
Array ( [id] => 15388759 [patent_doc_number] => 10535578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-14 [patent_title] => Semiconductor devices, and a method for forming a semiconductor device [patent_app_type] => utility [patent_app_number] => 15/719653 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 12017 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719653 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/719653
Semiconductor devices, and a method for forming a semiconductor device Sep 28, 2017 Issued
Array ( [id] => 14137935 [patent_doc_number] => 20190103357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => METHODS OF FORMING PACKAGE ON PACKAGE ASSEMBLIES WITH REDUCED Z HEIGHT AND STRUCTURES FORMED THEREBY [patent_app_type] => utility [patent_app_number] => 15/720393 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720393 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720393
METHODS OF FORMING PACKAGE ON PACKAGE ASSEMBLIES WITH REDUCED Z HEIGHT AND STRUCTURES FORMED THEREBY Sep 28, 2017 Abandoned
Array ( [id] => 16372601 [patent_doc_number] => 10804367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Gate stacks for stack-fin channel I/O devices and nanowire channel core devices [patent_app_type] => utility [patent_app_number] => 15/719686 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 44 [patent_no_of_words] => 9854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719686 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/719686
Gate stacks for stack-fin channel I/O devices and nanowire channel core devices Sep 28, 2017 Issued
Array ( [id] => 12154849 [patent_doc_number] => 20180026112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING MULTIWORK FUNCTION GATE PATTERNS' [patent_app_type] => utility [patent_app_number] => 15/720812 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 12787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720812 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720812
SEMICONDUCTOR DEVICE HAVING MULTIWORK FUNCTION GATE PATTERNS Sep 28, 2017 Abandoned
Array ( [id] => 13709049 [patent_doc_number] => 20170365479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/697905 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15697905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/697905
Semiconductor device Sep 6, 2017 Issued
Array ( [id] => 14093943 [patent_doc_number] => 10242884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-26 [patent_title] => Integration of air-sensitive two-dimensional materials on arbitrary substrates for the manufacturing of electronic devices [patent_app_type] => utility [patent_app_number] => 15/693827 [patent_app_country] => US [patent_app_date] => 2017-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 4320 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693827 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693827
Integration of air-sensitive two-dimensional materials on arbitrary substrates for the manufacturing of electronic devices Aug 31, 2017 Issued
Array ( [id] => 12154680 [patent_doc_number] => 20180025944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'SELF-ALIGNED CONTACT CAP' [patent_app_type] => utility [patent_app_number] => 15/685776 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15685776 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/685776
Self-aligned contact cap Aug 23, 2017 Issued
Array ( [id] => 12054501 [patent_doc_number] => 20170330846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'SWITCH CIRCUIT PACKAGE MODULE' [patent_app_type] => utility [patent_app_number] => 15/667640 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5049 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667640 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667640
Switch circuit package module Aug 2, 2017 Issued
Array ( [id] => 12141287 [patent_doc_number] => 20180019370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'LED HAVING VERTICAL CONTACTS REDISTRIBUTED FOR FLIP CHIP MOUNTING' [patent_app_type] => utility [patent_app_number] => 15/664651 [patent_app_country] => US [patent_app_date] => 2017-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15664651 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/664651
LED HAVING VERTICAL CONTACTS REDISTRIBUTED FOR FLIP CHIP MOUNTING Jul 30, 2017 Abandoned
Array ( [id] => 17500843 [patent_doc_number] => 11289553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Display devices and methods of manufacturing display devices [patent_app_type] => utility [patent_app_number] => 15/663546 [patent_app_country] => US [patent_app_date] => 2017-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12983 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15663546 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/663546
Display devices and methods of manufacturing display devices Jul 27, 2017 Issued
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