Search

John D. Blanton

Examiner (ID: 12088)

Most Active Art Unit
2466
Art Unit(s)
2466, 2619, 2419
Total Applications
1157
Issued Applications
871
Pending Applications
78
Abandoned Applications
233

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19596019 [patent_doc_number] => 12153867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Reduced-power dynamic data circuits with wide-band energy recovery [patent_app_type] => utility [patent_app_number] => 18/204230 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8240 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204230 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/204230
Reduced-power dynamic data circuits with wide-band energy recovery May 30, 2023 Issued
Array ( [id] => 19313431 [patent_doc_number] => 12039246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Circuit layout [patent_app_type] => utility [patent_app_number] => 18/325501 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325501 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/325501
Circuit layout May 29, 2023 Issued
Array ( [id] => 18881823 [patent_doc_number] => 20240005192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD AND APPARATUS FOR FABRICATING QUANTUM CIRCUIT, DEVICE, MEDIUM, AND PRODUCT [patent_app_type] => utility [patent_app_number] => 18/202209 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18202209 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/202209
METHOD AND APPARATUS FOR FABRICATING QUANTUM CIRCUIT, DEVICE, MEDIUM, AND PRODUCT May 24, 2023 Pending
Array ( [id] => 19487513 [patent_doc_number] => 12107240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Smart battery management systems [patent_app_type] => utility [patent_app_number] => 18/198268 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 17551 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198268
Smart battery management systems May 15, 2023 Issued
Array ( [id] => 19267961 [patent_doc_number] => 20240211665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => INTEGRATED CIRCUIT GENERATOR USING A PROVIDER [patent_app_type] => utility [patent_app_number] => 18/197422 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18197422 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/197422
INTEGRATED CIRCUIT GENERATOR USING A PROVIDER May 14, 2023 Pending
Array ( [id] => 18811178 [patent_doc_number] => 20230385514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => USING MACHINE TRAINED NETWORK DURING ROUTING TO MODIFY LOCATIONS OF VIAS IN AN IC DESIGN [patent_app_type] => utility [patent_app_number] => 18/142483 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142483 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142483
USING MACHINE TRAINED NETWORK DURING ROUTING TO MODIFY LOCATIONS OF VIAS IN AN IC DESIGN May 1, 2023 Pending
Array ( [id] => 18742107 [patent_doc_number] => 20230351089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => USING A MACHINE TRAINED NETWORK DURING ROUTING TO ACCOUNT FOR OPC COST [patent_app_type] => utility [patent_app_number] => 18/142501 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142501 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142501
USING A MACHINE TRAINED NETWORK DURING ROUTING TO ACCOUNT FOR OPC COST May 1, 2023 Pending
Array ( [id] => 20717380 [patent_doc_number] => 12632631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Making circuitry having an attribute [patent_app_type] => utility [patent_app_number] => 18/142087 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142087
Making Circuitry Having An Attribute May 1, 2023 Issued
Array ( [id] => 18811177 [patent_doc_number] => 20230385513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => USING MACHINE TRAINED NETWORK DURING ROUTING TO PERFORM PARASITIC EXTRACTION FOR AN IC DESIGN [patent_app_type] => utility [patent_app_number] => 18/142482 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142482 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142482
USING MACHINE TRAINED NETWORK DURING ROUTING TO PERFORM PARASITIC EXTRACTION FOR AN IC DESIGN May 1, 2023 Pending
Array ( [id] => 19129731 [patent_doc_number] => 20240135084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => OPTIMIZING MACHINE LEARNING CLASSIFICATION MODELS FOR RESOURCE CONSTRAINTS IN ELECTRONIC DESIGN AUTOMATION (EDA) COMPUTER AIDED DESIGN (CAD) FLOWS [patent_app_type] => utility [patent_app_number] => 18/141257 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141257
OPTIMIZING MACHINE LEARNING CLASSIFICATION MODELS FOR RESOURCE CONSTRAINTS IN ELECTRONIC DESIGN AUTOMATION (EDA) COMPUTER AIDED DESIGN (CAD) FLOWS Apr 27, 2023 Pending
Array ( [id] => 18725178 [patent_doc_number] => 20230339343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SYSTEMS AND METHODS FOR CHARGING ELECTRIC VEHICLES AND TRAILERS [patent_app_type] => utility [patent_app_number] => 18/137908 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/137908
SYSTEMS AND METHODS FOR CHARGING ELECTRIC VEHICLES AND TRAILERS Apr 20, 2023 Pending
Array ( [id] => 19006289 [patent_doc_number] => 20240070360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SIMULATION SYSTEM FOR A CYLINDRICAL 3-DIMENSIONAL SEMICONDUCTOR DEVICE USING A HYBRID MESH AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/134311 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134311
SIMULATION SYSTEM FOR A CYLINDRICAL 3-DIMENSIONAL SEMICONDUCTOR DEVICE USING A HYBRID MESH AND METHOD THEREOF Apr 12, 2023 Pending
Array ( [id] => 18541555 [patent_doc_number] => 20230246671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => Systems, Methods, and Graphical User Interfaces for Automatic Audio Routing [patent_app_type] => utility [patent_app_number] => 18/133484 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133484 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133484
Systems, methods, and graphical user interfaces for automatic audio routing Apr 10, 2023 Issued
Array ( [id] => 19552220 [patent_doc_number] => 12135929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => DVD simulation using microcircuits [patent_app_type] => utility [patent_app_number] => 18/298654 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 10731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298654
DVD simulation using microcircuits Apr 10, 2023 Issued
Array ( [id] => 18956994 [patent_doc_number] => 20240045321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => OPTICAL PROXIMITY CORRECTION METHOD USING NEURAL JACOBIAN MATRIX AND METHOD OF MANUFACTURING MASK BY USING THE OPTICAL PROXIMITY CORRECTION METHOD [patent_app_type] => utility [patent_app_number] => 18/131436 [patent_app_country] => US [patent_app_date] => 2023-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18131436 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/131436
OPTICAL PROXIMITY CORRECTION METHOD USING NEURAL JACOBIAN MATRIX AND METHOD OF MANUFACTURING MASK BY USING THE OPTICAL PROXIMITY CORRECTION METHOD Apr 5, 2023 Pending
Array ( [id] => 18533737 [patent_doc_number] => 20230238814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => Charger, charging device, energy supply device and control method of charger [patent_app_type] => utility [patent_app_number] => 18/295255 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295255 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295255
Charger, charging device, energy supply device and control method of charger Apr 2, 2023 Pending
Array ( [id] => 19482509 [patent_doc_number] => 20240330551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT USING INTENT BASED TIMING CONSTRAINTS [patent_app_type] => utility [patent_app_number] => 18/192893 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192893 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/192893
TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT USING INTENT BASED TIMING CONSTRAINTS Mar 29, 2023 Pending
Array ( [id] => 19610319 [patent_doc_number] => 12159195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Short-depth active learning quantum amplitude estimation without eigenstate collapse [patent_app_type] => utility [patent_app_number] => 18/193082 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193082 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193082
Short-depth active learning quantum amplitude estimation without eigenstate collapse Mar 29, 2023 Issued
Array ( [id] => 19482510 [patent_doc_number] => 20240330552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => AUTOMATIC VERIFICATION OF HARDWARE CRYPTOGRAPHIC IMPLEMENTATIONS [patent_app_type] => utility [patent_app_number] => 18/192002 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192002 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/192002
AUTOMATIC VERIFICATION OF HARDWARE CRYPTOGRAPHIC IMPLEMENTATIONS Mar 28, 2023 Pending
Array ( [id] => 18499517 [patent_doc_number] => 20230222274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => Techniques For Replacing Logic Circuits In Modules With Configurable Circuits [patent_app_type] => utility [patent_app_number] => 18/124259 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124259 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124259
Techniques For Replacing Logic Circuits In Modules With Configurable Circuits Mar 20, 2023 Pending
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