
John D. Blanton
Examiner (ID: 12088)
| Most Active Art Unit | 2466 |
| Art Unit(s) | 2466, 2619, 2419 |
| Total Applications | 1157 |
| Issued Applications | 871 |
| Pending Applications | 78 |
| Abandoned Applications | 233 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9195699
[patent_doc_number] => 20130335014
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[patent_kind] => A1
[patent_issue_date] => 2013-12-19
[patent_title] => 'POWER TOOL BATTERY PACK WIRELESS CHARGER'
[patent_app_type] => utility
[patent_app_number] => 13/769637
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Array
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[patent_doc_number] => 20140040848
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[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'Controllable Turn-Around Time For Post Tape-Out Flow'
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Array
(
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[patent_issue_date] => 2014-01-09
[patent_title] => 'ESD ANALYSIS APPARATUS'
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Array
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[patent_issue_date] => 2015-09-29
[patent_title] => 'Analysis of chip-mean variation and independent intra-die variation for chip yield determination'
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Array
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[patent_title] => 'System and method for large multiplexer identification and creation in a design of an integrated circuit'
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Array
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[patent_title] => 'Macro timing analysis device, macro boundary path timing analysis method and macro boundary path timing analysis program'
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Array
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[patent_title] => 'Multiple-instantiated-module (MIM) aware pin assignment'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/753103 | Multiple-instantiated-module (MIM) aware pin assignment | Jan 28, 2013 | Issued |
Array
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[id] => 9012599
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[patent_title] => 'Automated synthesis of high-performance two operand binary parallel prefix adder'
[patent_app_type] => utility
[patent_app_number] => 13/752934
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Array
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[patent_title] => 'System and method for generating constrained random values associated with an electronic design'
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Array
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[patent_title] => 'Determining the gradient and Hessian of the image log slope for design rule optimization for accelerating source mask optimization (SMO)'
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[patent_app_number] => 13/741802
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Array
(
[id] => 8815962
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[patent_issue_date] => 2013-05-09
[patent_title] => 'METHOD AND APPARATUS FOR TURNING CUSTOM PROTOTYPE BOARDS INTO CO-SIMULATION, CO-EMULATION SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/730543
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/730543 | Method and apparatus for turning custom prototype boards into co-simulation, co-emulation systems | Dec 27, 2012 | Issued |
Array
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[patent_title] => 'FIELD-PROGRAMMABLE MODULE FOR INTERFACE BRIDGING AND INPUT/OUTPUT EXPANSION'
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Array
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Array
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[patent_title] => 'FLEXIBLE PIN ALLOCATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/725215 | Flexible pin allocation | Dec 20, 2012 | Issued |
Array
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Array
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[patent_title] => 'ANALYSIS OF CHIP-MEAN VARIATION AND INDEPENDENT INTRA-DIE VARIATION FOR CHIP YIELD DETERMINATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/716283 | ANALYSIS OF CHIP-MEAN VARIATION AND INDEPENDENT INTRA-DIE VARIATION FOR CHIP YIELD DETERMINATION | Dec 16, 2012 | Abandoned |
Array
(
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